Overlay Pages
7.11.2 Using Overlay Pages With the SECTIONS Directive
Example 7–11. SECTIONS Directive Definition for Overlays in Figure 7–6
7-50
Assume that you are using the MEMORY directive as shown in Example 7–10.
Further assume that your code consists of, besides the usual sections, four
modules of code that you want to load in data memory space but that you
intend to run in the on-chip RAM in program memory space. Example 7–11
shows how to use the SECTIONS directive overlays accordingly.
SECTIONS
{
UNION :
run = ONCHIP
{
S1 :
load = OVR_MEM PAGE 1
{
s1_load = 0A00h;
s1_start = .;
f1.obj (.text)
f2.obj (.text)
s1_length = . – s1_start;
}
S2 :
load = OVR_MEM PAGE 2
{
s2_load = 0A00h;
s2_start = .;
f3.obj (.text)
f4.obj (.text)
s2_length = . – s2_start;
}
}
.text: load = PROG PAGE 0
.data: load = PROG PAGE 0
.bss : load = DATA PAGE 1
}\
The four modules of code are f1, f2, f3, and f4. The modules f1 and f2 are
combined into output section S1, and f3 and f4 are combined into output
section S2. The PAGE specifications for S1 and S2 tell the linker to link these
sections into the corresponding pages. As a result, they are both linked to load
address A00h, but in different memory spaces. When the program is loaded,
a loader can configure hardware so that each section is loaded into the
appropriate memory bank.
Output sections S1 and S2 are placed in a union that has a run address in
on-chip RAM. The application must move these sections at runtime before
executing them. You can use the symbols s1_load and s1_length to move
section S1, and s2_load and s2_length to move section S2. The special
symbol "." refers to the current run address, not the current load address.
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