Emif Ce Space Secondary Control Register (Cesec) - Texas Instruments TMS320C6000 DSP Reference Manual

4.8.3 EMIF CE Space Secondary Control Registers (CESEC0−3)
Figure 4−38. EMIF CE Space Secondary Control Register (CESEC)
31
15
Reserved
R/W-0
Legend: R/W = Read/Write; -n = value after reset
SPRU266A
The CE space secondary control register (CESEC) is shown in Figure 4−38
and described in Table 4−18. These registers are added for the programmable
synchronous interface, and control the cycle timing of programmable
synchronous memory accesses and the clock, used for synchronization for the
specific CE space. CESEC applies only to C64x programmable synchronous
memory interface.
Reserved
R/W-0
7 6 5
SNCCLK RENEN
R/W-0 R/W-0
EMIF Registers
4 3 2 1
CEEXT SYNCWL SYNCRL
R/W-0 R/W-0 R/W-10
TMS320C64x EMIF
16
0
4-63