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Digital Modules FAST - SPEED-Bus
321-1BH70 - DI 16xDC 24V > Parameterization
Record set 81h Input filter
48bytes in the process
image
94
Byte
Bit 7 ... Bit 0
16
n
Bit 1, 0: Time stamp channel 0 (I+0.0)
–
–
–
–
...
...
31
n
Bit 1, 0: Time stamp channel 15 (I+1.7)
–
–
–
–
This record set allows you to preset an input filter in steps of 2.56µs steps for I+0.0 ... I
+1.7. By preceding a filter you define how long an input signal must be present before it is
recognized as "1" signal. With the help of filters you may e.g. filter signal peaks at a
blurred input signal.
The entry happens as a factor of 2.56µs (2.56µs ... 40ms) and is within the range 1 ...
16000.
The record set has the following structure:
Word
0
Input filter I+0.0 in 2.56µs steps
...
...
30
Input filter I+1.7 in 2.56µs steps
The module occupies 48byte in the input address range of the CPU that have the fol-
lowing meaning:
Byte
Bit 7 ... Bit 0
0
State of the channels (1 = set, 0 = not set)
Bit 0: Status I+0.0
n
n
...
n
Bit 7: Status I+0.7
1
State of the channels (1 = set, 0 = not set)
n
Bit 8: Status I+1.0
n
...
n
Bit 15: Status I+1.7
2 ... 3
reserved
00 = no time stamp
01 = Time stamp at ascending edge
10 = Time stamp at descending edge
11 = Time stamp at both edges
00 = no time stamp
01 = Time stamp at ascending edge
10 = Time stamp at descending edge
11 = Time stamp at both edges
VIPA System 300S
HB140 | SM-DIO | | en | Rev. 16-43
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