YASKAWA VIPA System 300S Manual page 93

VIPA System 300S
Record set 80h ETS time
stamp (Byte 16 ... 31)
HB140 | SM-DIO | | en | Rev. 16-43
The record set has the following structure:
Byte
0
n Bit 1 ... 0: Edge selection I+0.0
–
–
–
–
n Bit 7 ... 2: reserved
... ...
15 n Bit 1 ... 0: Edge selection I+1.7
–
–
–
–
n Bit 7 ... 2: reserved
Every SPEED-Bus module carries along a timer with a resolution of 1µs. The timer starts
at boot-up of the CPU. Thus gives you a time base with an accuracy of ±1µs at the
SPEED-Bus. By parameterization of the ETS function (Edge Timestamp) for an input, the
current time value is entered in the process image of the module at according edge. Thus
allows you to compare times of different input channels via your user application.
Via the parameter Time stamp you may activate the ETS system and define the edge of
the input signal that initiates the process image entry of a time stamp. You have the fol-
lowing options:
No time stamp
n
n Time stamp at ascending edge
n Time stamp at descending edge
n Time stamp at both edges
Allocation in the process image
The stored times correspond the point in time when the signal has
already passed the input filter of the module. To calculate the real time at
the clamp, you have to subtract the delay time of 1
ized delay time defined under Filter.
321-1BH70 - DI 16xDC 24V > Parameterization
00b = de-activated
01b = Process interrupt at ascending edge
10b = Process interrupt at descending edge
11b = Process interrupt at both edges
00b = de-activated
01b = Process interrupt at ascending edge
10b = Process interrupt at descending edge
11b = Process interrupt both edges
Ä '48bytes in the process image' on page 94
Digital Modules FAST - SPEED-Bus
m s and the parameter-
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