Basler A202K Manual page 20

Camera Interface
• After all of the pixels in line one have been transmitted, the line valid bit will become low indi-
cating that valid data for line one is no longer being transmitted.
• On the pixel clock cycle where data transmission for line two begins, the line valid bit will
become high. Ten of the bits transmitted during this clock cycle will contain the data for pixel
number one in line two and ten of the bits will contain data for pixel number two in line two.
• On the next cycle of the pixel clock, the line valid bit will be high. Ten of the bits transmitted
during this clock cycle will contain the data for pixel number three in line two and ten of the
bits will contain data for pixel number four in line two.
• On the next cycle of the pixel clock, the line valid bit will be high. Ten of the bits transmitted
during this clock cycle will contain the data for pixel number five in line two and ten of the bits
will contain data for pixel number six in line two.
• This pattern will continue until all of the pixel data for line two has been transmitted.
• After all of the data for the pixels in line two has been transmitted, the line valid bit will
become low indicating that valid data for line two is no longer being transmitted.
• The camera will continue to transmit pixel data for each line as described above until all of
the lines in the frame have been transmitted. After all of the lines have been transmitted, the
frame valid bit will become low indicating that a valid frame is no longer being transmitted.
Figure 2-4 shows the data sequence when the camera is operating in level-controlled exposure
mode. Figure 2-5 shows the data sequence when the camera is operating in programmable
exposure mode.
2-10
DRAFT
k
BASLER A202