Siemens SIMATIC ET 200SP Manual page 22

Modes and Functions
3.2 Pulse output (single pulse) mode
Control and feedback signals for Pulse output mode
Control interface:
Offset to the start address
Channel 0 Channel 1
1
Bytes 0 to 3 Bytes 12 to 15 OUTPUT_VALUE
Bytes 4 to 7 Bytes 16 to 19 SLOT
Byte 8 Byte 20
Byte 8: Bit 4 Byte 20: Bit 4
Byte 9: Bit 0 Byte 21: Bit 0
Byte 9: Bit 1 Byte 21: Bit 1
Byte 9: Bit 3 Byte 21: Bit 3
Byte 9: Bit 4 Byte 21: Bit 4
Byte 10: Bit 0 Byte 22: Bit 0
Only if the module is configured as "2 channels (2 A)" and not "1 channel (4 A)".
1
Note: All bytes and bits not described in the table above are reserved and should be 0.
22
Parameter Meaning
Pulse duration: the time that the DQn.A digital output remains set after the On-delay
time expires. If you violate the lower or upper limit of the range, then ERR_OUT_VAL
(DWord)
is returned in the feedback interface and the last valid value is used.
High-speed output disabled:
10 μs to 85,000,000 μs
The On-delay can be changed before the start of the output sequence. See
MODE_SLOT.
(DWord)
0 μs to 85,000,000 μs
LD_SLOT Interpretation of the value SLOT: all other values not listed below are invalid and
produce the error ERR_LD (in single-update mode) or ERR_SLOT_VAL (in perma-
nent-update mode).
Bit 3
0
0
MODE_SLOT Bit 4
0
1
SW_ENABLE Bit 0
0
0 → 1
1
TM_CTRL_DQ Bit 1
0
1
SET_DQA Bit 3
0
1
SET_DQB Bit 4
0
1
RES_ERROR Bit 0
0
1
High-speed output enabled:
2 μs to 85,000,000 μs
Bit 2 Bit 1 Bit 0
0 0 0 Idle state; nothing is done with the value
0 1 0 On-delay in μs
Mode for use of the field SLOT.
Single-update mode
Permanent-update mode
Software enable: Start/enable and terminate/disable the output sequence.
Output disabled/terminated
Starts output sequence on positive edge when "Function DI" = "Input"
Enable output sequence, when start is dependent on HW enable with
"Function DI" = "HW enable"
Set DQn.A output source: Select either CPU program or module's output
sequence.
DQn.A and DQn.B are controlled by the CPU (your program logic) using the
SET_DQA and SET_DQB control bits.
DQn.A is controlled by the module's pulse output sequence. DQn.B is
always 0.
Controls the value of the digital output DQn.A, if TM_CTRL_DQ is cleared.
0 on DQn.A
1 on DQn.A
Controls the value of the digital output DQn.B, if TM_CTRL_DQ and
SET_DQA are cleared.
0 on DQn.B
1 on DQn.B
Reset pending errors (ERR_LD, ERR_DQA, ERR_DQB, and ERR_24V).
Reset of errors is not active
Reset of errors is active
Technology module TM Pulse 2x24V (6ES7138‑6DB00‑0BB1)
Manual, 09/2015, A5E35061186-AA