Keysight N5264A Service Manual page 61

REAR PANEL
N5264A Overall Block Diagram
INTERCONNECTS
(Includes Options 700 - Standard; 108 - LO Source
Service Guide: N5264-90001
PROCESSOR
A51 A17 CPU
HARD DISK
DRIVE
USB
USB x 4 EEPROM
INTERFACE
PCI BUS
MAIN
CONTROLLER GPIB PORT
INTERFACE CPU
GPIB
10/100 BASE-T ROM RAM
LAN
ETHERNET
VGA VIDEO PROCESSOR
VGA INTERFACE
VIDEO RAM
A16
POWER
A15 MIDPLANE
SUPPLY
AC LINE IN
A18 A14
GPIB SYSTEM
MOTHERBOARD
TALKER/LISTENER GPIB PORT
INTERFACE LOCAL DIGITAL BUS
GPIB
HIGH DENSITY DATA BUS
POWER BUS
LOCAL DIGITAL BUS
MIXED POWER AND CONTROL SIGNALS
FROM THE
SERIAL TEST BUS NODES
Bx = ACTIVE SOURCE BAND
A20 J20
PULSE I/O
N/C
A20 J2
A
A20 J202
B
A20 J602
IF INPUTS C/R1
A20 J802
D/R2
A20 J402
R
A10 FREQUENCY REFERENCE
10 MHz 10 MHz
J3
10 MHz
HIGH STAB 2
OCXO
DAC
100 MHz
10
ƒ
W68
10 MHz 215
REF OUT
10 MHz
200 Hz 211
W69 J2
10 MHz
REF IN
50 OHM
LOAD
W47
LO OUT (J5)
A19 TEST SET MOTHERBOARD
BIAS 1 IN
NC
J541
BIAS 3 IN
NC
J542
BIAS 4 IN
NC
J543
BIAS 2 IN
NC
J544
MEAS TRIG RDY MEAS TRIG RDY
AUX TRIG 1 IN AUX TRIG 1 IN
AUX TRIG 1 OUT AUX TRIG 1 OUT
AUX TRIG 2 IN AUX TRIG 2 IN
POWER
AUX TRIG 2 OUT AUX TRIG 2 OUT BUS
TO
28 V 28 V A34 THRU A37,
A42 THRU A49
MEAS TRIG IN MEAS TRIG IN
LOCAL
DIGITAL BUS
25
TEST SET I/O
TEST SET /O \
INTERFACE
9
PWR I/O
PWR O I/ \
INTERFACE
36
HANDLER O I/
HANDLER O I/ \
INTERFACE
21 August 2008 N5264A_blk
FRONT PANEL
INTERCONNECTS
A3 A2
USB x 4
DISPLAY USB BD
A12 SIGNAL PROCESSING
ADC MODULE (SPAM)
USB
9 MHz
HUB
DISPLAY INVERTER
KEYPAD
POWER
ADC 15 MHz
FLASH
RAM
SPEAKER
9 MHz
A1 FRONT PANEL INTERFACE BOARD
ADC
15 MHz
PCI
9 MHz
BRIDGE
ADC 15 MHz
DSP
9 MHz
RAM
ADC 15 MHz
9 MHz
ADC 15 MHz
POWER BUS
D D ITHER
X6
NOISE
TO A10, A11, A21 10 MHz REF J3
A19 TEST SET MOTHERBD
W64
10 MHz REF
J4
50 MHz
W65
50 MHz REF
J5
NC
J6
NC
J7
NC
J8
OPTION 108
A11 13.5 GHz LO SYNTHESIZER
6.752-8.0 GHz 10.664-13.510 GHz
B23,
2-4 GHz 29-30 B26-28,34-36
B24-28,
31-36
B22,
26-28, 5.332-6.752 GHz X2
B21-36 8.0-10.664 GHz
34-36 B21-36
MAIN X2
B21, B24-25,31-33
4.0-5.332 GHz
24-25,
Frac-N 31-33
ƒ
Logic
3.0-4.0 GHz
B19-20
50 MHz
REF
B21-23,29-30
2.0-3.0 GHz
B18
J5
B14-20 B2-23, 29-30
1.0-2.0 GHz
B16-17
2
Frac-N
B2-13
ƒ
Logic 0.5-1.0 GHz
B14-15
4
3.4 GHz
LOCAL 0.01-0.5 GHz
DIGITAL R B2-13
BUS
L I
POWER
BUS HET
A20 IF MULTIPLEXER
Main IF A
10.7 MHz
PulseA PULSE
GATES
IF OUT A
P3 EXT IF IN A
J1 W59
A
AUX R4
W60
J2 Main IF B
B
10.7 MHz
Pulse B PULSE
GATES
IF OUT B
EXT IF IN B
P203
W61
J4
R AUX R3
W62
J5
Main IF R
C/R1
10.7 MHz
IF OUT R Pulse R PULSE
GATES
P403
J6 W63 EXT IF IN R
D/R2
Main IF C
10.7 MHz
Pulse C PULSE
GATES
IF OUT C
EXT IF IN C
P603
AUX R2
Main IF D
10.7 MHz
Pulse D
PULSE
GATES
IF OUT D
EXT IF IN D
P803
AUX R1
PULSE
MODULATION LOGIC
(DISABLED)
EXT TEST SET DRIVE LO OUT
A21 LO MULTIPLIER/AMPLIFIER 26.5 (HMA26.5)
20.0 - 26.5 GHz
B33-36
15.4 - 20.0 GHz
B29-36
1 B29-36 B30-32 26 GHz
X2 0.013-26.508 GHz
12.5 MHz
B2-36 to
13.518-26.508 GHz
0.010-13.510 GHz 13.518 GHz 13.5-15.4 GHz B2-28
B29
-10 to +10 dBm
W41
J1207 511
ALC 13 GHz
B2-28 0.013-13.518 GHz
FROM
A19
LOCAL
DIGITAL BUS
POWER
BUS
A
P1
B
P201
R1
P411
R2
P412
R
R3
P413
R4
P414
C/R1
P601
D/R2
P801
P1
2