Characterizing The Mos Capacitor In Inversion; Equivalent Circuits Of The Mos Capacitor - Keithley 595 Instruction Manual

APPLICATIONS
c vs. v
C
ACCUMULATIDN INVERSION
Remember that the voltage source output is applied to the
substrate and the gate is at virtual ground. This means that
the voltage source output is equal to minus the gate bias
voltage. Plotting with the Model 595 set to code 43 allows
the voltage axis of a dig&I plot to be inverted so that the
curve has the usual capacitance versus gate bias shape.
DEPLETION
I
-v
Figure 5-9. C vs. V Curve
In accumulation, majority carriers are attracted to the
Si-SiO;interface. Since the majority carrier density 'is much
higher than minority carrier density, the majority carriers
determine the response of the device to a step in voltage.
The charge exchange which satisfies the AQ = C AVvrela-
tion occurs at the interface, so the capacitance measured
is C, , the oxide capacitance. 6. is determined by the area
of the gate, the thickness of the oxide, and the dieleticc
constant of the insulating film.
In depletion, the majoritycarriers are repelled from the in-
terface creating a region depleted of majority carriers. This
is referred to as the depletion or space charge region. The
width of this region ie~determined by the number of hn-
purity atoms which must give up majority carriers to satisfy
the charge exchange. The charge exchange occurs at the
edge of the depletion region. Effecthely, then, there is a
depletion layer capacitance, Co, in series with C, , so that
the total capacitance is lower in depletion. Since the charge
exchange is dominated by this exchange of majority
carriers, device response in depletion is fast (even
microseconds
or
less).
In accumulation or depletion, the capacitive displacement
charge wilI transfer long before Q/t is measured. Q/t will
therefore represent DC error currents from the fiiture and
the device, such as oxide leakage. As with fixture leakage
alone, plotting Qkversus V can be helpful in diagnosing
DC error current sources. It is important to note the level
of DC error currents in depletion and accumulation for later
use in determinin g conditions for equilibrium measurement
in the inversion region.
5.3.3 Characterizing the MOS Capacitor
in Inversion
In inversion, majority carriers are depleted from the Si-SiO,
interface as in depletion. However, once the Fermi level at
the interface reaches the intrinsic Fermi level, 'a layer of
minority carriers will begin to form at the interface. For-
mation of the layer is usually dependent upon charge
transfer through traps. in the depletion layer at room
temperature.
Thii process can be modeled as a generation conductance
(G,,) in series with an inversion layer capacitance C,. The
series combination is then in parallel with the depletion
capacitance, as shown in Figure 540. C, is much larger than
CD, so that,
given sufficient time to respond, C, will
dominate the response and C, will be unaffected. The in-
version layer time constant will be on the order of
milliseconds to tens of seconds, depending on the device.
The remaining MOS CV curve region, inversion, will be
discussed separately in paragraph 5.3.3.
cox
ACCUMULATION:
+-it--o
To Measure c Lift the probe or disconnect the device as
cox co
close to the device as possible. The capacitance measured
DEPLETION:
,J-lHt-4
under this condition is the futture offset. PreSS SUPPRESS
cox co
to make measurements relative to this value. The Q/t value INVERSION:
obtained wiII now be the fucture leakage. If significant fx-
ture leakage is suspected, it may be useful to measure Q/t
"'-cLiT
versus V in order to determine whether the leakage is
CI G~R
resistive or constant. Now connect the probe and bias the
device into accumulation. The value of the capacitance
measured at this bias is C, Often, a curve normalized to
Figure 5-10. Equivalent Circuits of the MOS
C, is desired, so the 6. value would be stored as Co. Then
Capacitor
when a curve is measured, using C/Co will yield CJZ, .
5-9