Toshiba PORTEGE S100 Maintenance Manual page 62

2.4 System Board Troubleshooting
LED Status
01h
02h
03h
PORTEGE S100 Maintenance Manual (960-508)
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Table 2-4 D port status (3/8)
Test item
Check of DRAM type and size
SM-RAM stack area test
CMOS access test
CMOS checksum check
SM-RAM stack area test
2 Troubleshooting Procedures
Message
Check of DRAM type and size (at Cold boot)
When supporting memory is connected, becoming HLT
after beep sound
Test of SM-RAM stuck area
HLT when DRAM size is 0
Cache configuration
Cache permission
CMOS access test (at Cold Boot) (HLT when an error is
detected.)
Battery level check of CMOS
CMOS checksum check
Initialization of CMOS data (1)
Setting of IRT status (Boot status, the remaining bit is 0.)
Storing DRAM size in CMOS
Resume branch (at Cold Boot)
Not resume when a CMOS error occurred
Not resume when resume status code is not set
Resume error check
S3 returning error (1CH) (Resume error 74H)
SM-RAM checksum check (Resume error 73H)
Check of memory configuration change (Resume
error 73H)
RAM area checksum check in system BIOS (Resume
error 79H)
Expansion memory checksum check resume error
(Resume error 76H)
PnP RAM checksum check (Resume error 77H)
Transition to RESUME-MAIN
Resume error process
Reset of CPU clock to low
Prohibition of all SMI
Clearance of resume status
Return to ROM
Turning area of C0000h to EFFFFh to PCI (Prohibition
of DRAM)
Setting of resume error request
ROM/RAM copy of system BIOS (HLT when copied
BIOS checksum error)
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