Xmcm Operation - Texas Instruments TMS320C6000 Reference Manual

Figure 42.

XMCM Operation

(a) XMCM = 00b
FSX
DX
XRDY
Write of DXR
(E1)
DXR to XSR
(E0)
SPRU580C
high-impedance state. For receiving, a RBR-to-DRR copy occurs only for
those elements that are selected via RP(A/BBLK and RCER. If RINT were
to be generated for every RBR-to-DRR copy, it would occur as many times
as the number of elements selected in RCER (and not the number of
elements programmed in RFRLEN1). For transmitting, the same
subframe that is used for reception is used to maintain symmetry, so the
value XP[A/B]BLK does not matter. DXR is loaded, and DXR-to-XSR copy
occurs for all the elements that are enabled via RP[A/B]BLK. However, DX
is driven only for those elements that are selected via XCER. The
elements enabled in XCER can be either a subset of, or the same as, those
selected in RCER. Therefore, if XINTM = 00b, transmit interrupts to the
CPU would be generated the same number of times as the number of
elements selected in RCER (not XCER).
Figure 42 shows the activity on the McBSP pins for all of the preceding XMCM
bit values with the following conditions:
(R/X)PHASE = 0: Single-phase frame for multichannel selection enabled
-
FRLEN1 = 011b: 4-element frame
-
WDLEN1 = Any valid serial element length
-
In the following illustrations, the arrows indicating the occurrence of events are
only sample indications.
E0
DXR-to-XSR copy
(E1)
Write of DXR
(E2)
Multichannel Selection Operation
E1 E2
Write of DXR
(E3)
DXR-to-XSR copy
(E2)
Multichannel Buffered Serial Port (McBSP)
E3
DXR-to-XSR copy
(E3)
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