ADLINK Technology COM Express Express-HLE User Manual page 24

3.3.17 Power And System Management
Signal Pin # Description
PWRBTN# B12 Power button to bring system out of S5 (soft off), active on falling edge.
SYS_RESET# B49 Reset button input. Active low request for module to reset and reboot. May
be falling edge sensitive. For situations when SYS_RESET# is not able to
reestablish control of the system, PWR_OK or a power cycle may be used.
CB_RESET# B50 Reset output from module to Carrier Board. Active low. Issued by module
chipset and may result from a low SYS_RESET# input, a low PWR_OK
input, a VCC_12V power input that falls below the minimum specification, a
watchdog timeout, or may be initiated by the module software.
PWR_OK B24 Power OK from main power supply. A high value indicates that the power is
good. This signal can be used to hold off Module startup to allow carrier
based FPGAs or other configurable devices time to be programmed.
SUS_STAT# B18 Indicates imminent suspend operation; used to notify LPC devices.
SUS_S3# A15 Indicates system is in Suspend to RAM state. Active-low output. An inverted
copy of SUS_S3# on the carrier board (also known as "PS_ON") may be
used to enable the non-standby power on a typical ATX power supply.
SUS_S4# A18 Indicates system is in Suspend to Disk state. Active low output.
SUS_S5# A24 Indicates system is in Soft Off state.
WAKE0# B66 PCI Express wake up signal.
WAKE1# B67 General purpose wake up signal. May be used to implement wake-up on
PS/2 keyboard or mouse activity.
BATLOW# A27 Battery low input. This signal may be driven low by external circuitry to
signal that the system battery is low, or may be used to signal some other
external power-management event.
LID# LID button. Low active signal used by the ACPI operating system for a LID
switch.
SLEEP# Sleep button. Low active signal used by the ACPI operating system to bring
the system to sleep state or to wake it up again.
3.3.18 Power and Ground
Signal Pin #
VCC_12V A104-A109
B104-B109
VCC_5V_SBY B84-B87
VCC_RTC A47
GND A1, A11, A21, A31,
A41, A51, A57, A66,
A80, A90, A96,
A100, A110, B1,
B11, B21 ,B31, B41,
B51, B60, B70, B80,
B90, B100, B110
Page 24
Description
Primary power input: +12V nominal (8.5 ~ 20V wide input).
All available VCC_12V pins on the connector(s) shall be used.
Standby power input: +5.0V nominal. If VCC5_SBY is used, all
available VCC_5V_SBY pins on the connector(s) shall be used.
Only used for standby and suspend functions. May be left
unconnected if these functions are not used in the system design.
Real-time clock circuit-power input. Nominally +3.0V.
Ground - DC power and signal and AC signal return path.
I/O PU/PD Comment
I 3.3VSB PU 10k
3.3VSB
I 3.3VSB PU 10k
3.3VSB
O 3.3VSB
I 3.3V PU 100k Should have
3.3VSB weak pull up
O 3.3VSB
O 3.3VSB
O 3.3VSB
O 3.3VSB
I 3.3VSB PU 10k
3.3VSB
I 3.3VSB PU 10k
3.3VSB
I 3.3VSB PU 10k
3.3VSB
I OD PU 10k
3.3VSB 3.3VSB
I OD PU 10K
3.3VSB 3.3VSB
I/O PU/PD Comment
P 8.5~20 V
P 5Vsb ±5%
P
P
Express-HLE