ADLINK Technology PXIe-3988 User Manual
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ADLINK Technology PXIe-3988 User Manual

Pxi express embedded controller
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PXIe-3988
PXI Express Embedded Controller
User's Manual
Manual Rev.:
Revision Date:
Part No:
1.0
July 04, 2021
50M-00028-1000

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Summary of Contents for ADLINK Technology PXIe-3988

  • Page 1 PXIe-3988 PXI Express Embedded Controller User’s Manual Manual Rev.: July 04, 2021 Revision Date: 50M-00028-1000 Part No:...
  • Page 2 Revision History Revision Release Date Description of Change(s) 2021-07-04 Initial release Revision History...

  • Page 3: Preface

    PXIe-3988 Preface Copyright © 2021 ADLINK Technology Inc. This document contains proprietary information protected by copy- right. All rights are reserved. No part of this manual may be repro- duced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
  • Page 4 WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Diox- ane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm.

  • Page 5: Table Of Contents

    2 Getting Started ..............17 Package Contents ............. 17 Operating System Installation ..........18 2.2.1 Installation Environment ........... 19 2.2.2 Installing the PXIe-3988 ........... 20 2.2.3 Replacing the Hard Drive or Solid State Drive ..23 2.2.4 Replacing the Battery Backup ........24 2.2.5...
  • Page 6 3 Driver Installation.............. 27 A Appendix: PXI Trigger I/O Functions .......29 Data Type ................29 Function Library ..............31 A.2.1 TRIG_Init ..............31 A.2.2 TRIG_Close .............. 32 A.2.3 TRIG_SetSoftTrg ............33 A.2.4 TRIG_Trigger_Route ..........34 A.2.5 TRIG_Trigger_Clear ..........36 A.2.6 TRIG_GetSoftTrg............
  • Page 7 PXIe-3988 B.5.10 System Management..........53 B.5.11 Flags................. 53 B.5.12 Power Consumption ..........54 B.5.13 Hardware Health Configuration ........ 55 B.5.14 PXIe Links Control Configuration ......55 Chipset................56 B.6.1 System Agent (SA) Configuration......56 B.6.2 PCH-IO Configuration..........57 Security................59 B.7.1...
  • Page 8 This page intentionally left blank. viii...

  • Page 9: List Of Figures

    PXIe-3988 List of Figures Figure 1-1: Functional Block Diagram..........3 Figure 1-2: Front Panel ..............7 Figure 1-3: PXI Trigger SMB Jack ............. 8 Figure 1-4: DisplayPort Connector............. 9 Figure 1-5: GPIB Connector............. 10 Figure 1-6: LED Indicators ............... 11 Figure 1-7: COM Port...............
  • Page 10 This page intentionally left blank. List of Figures...

  • Page 11: List Of Tables

    PXIe-3988 List of Tables Table 1-1: Front Panel Legend ............7 Table 1-2: DisplayPort Pin Assignment ..........9 Table 1-3: GPIB Pin Description ............. 10 Table 1-4: LED Indicator Legend ............ 11 Table 1-5: USB 2.0 Port Pin Assignment........12 Table 1-6: Ethernet Port Pin Assignments........
  • Page 12 This page intentionally left blank. List of Tables...

  • Page 13: Introduction

    With a configurable PCIe switch, the PXIe-3988 can support four links x4 or two links x8 x16 PXI Express link capability, with maximum system throughput of up to 16 GB/s (PCI Express 3.0).

  • Page 14: Features

    1.1 Features PXI-5 PXI Express Hardware Specification Rev.1.0  Intel® Xeon® E processor E-2276ME (formerly Coffee  Lake) 820EQ 2.8/4.5 GHz (Turbo), 45W (cTDP, 6C/GT2) Dual Channel DDR4 SO-DIMM  Up to 64 GB 2400 MHz  Maximum System Throughput 16 GB/s ...

  • Page 15: Specifications

    PXIe-3988 1.2 Specifications Front Panel DDR4 2133/2400 Intel® Xeon® E Connectors Memory MHz SODIMM x2 Processor DisplayPort PCIe 3.0 x16 (formerly “Coffee Lake”) DP/HDMI Dual Mode Connector x2 Intel FDI DMI 3.0 PCI Express Switch GPIB GPIB Controller PCIe x1 Connector PCIe 3.0...
  • Page 16 Supports 2133/2400 MHz RAM up to 64 GB total  Supports non-ECC, unbuffered memory  The externally accessible SO-DIMM socket can accept replacement DDR4 DRAM DIMM modules. PXIe-3988 specifications and stability guarantees are only sup- NOTE: NOTE: ported when ADLINK-provided DDR4 DRAM SO-DIMM mod- ules are used. Video DisplayPort resolution up to 3840 x 2160 @ 60 Hz ...
  • Page 17 PXIe-3988 Trigger I/O One SMB connector on the faceplate to route an external trigger signal to/from PXI trigger bus. Dimensions (3U PXI module) 3U/4-slot PXI standard Weight 1.0 kg (exclusive of packaging) Environmental Condition Range Operating temperature with SSD 0 to 55°C Operating temperature with HDD 0 to 50°C...
  • Page 18 FCC 47 CFR Part 15 Subpart B (Class B)  ICES-003 Issue 7-2020  AS/NZS CISPR 11: Group 1, Class A emissions  The PXIe-3988 meets the essential requirements of applicable European Directives. Power Requirements Typical Consumption DC +3.3V DC +12V...

  • Page 19: I/O And Indicators

    PXIe-3988 1.3 I/O and Indicators 1.3.1 Front Panel Figure 1-2: Front Panel GPIB Connector Reset Button (Micro D-Sub 25P) 2X DisplayPort 2X Gigabit Ethernet 2X USB 3.0 PXI Trigger 4X Type-A USB 2.0 LED indicators COM port (D-sub9 serial) Table 1-1: Front Panel Legend...

  • Page 20: Figure 1-3: Pxi Trigger Smb Jack

    The PXI trigger connector is an SMB jack, used to route external trigger signals to or from the PXI backplane. Trigger signals are TTL-compatible and edge sensitive. The PXIe-3988 provides four trigger routing modes from/to the PXI trigger connector to synchro-...

  • Page 21: Figure 1-4: Displayport Connector

    PXIe-3988 DisplayPort Connectors Provide monitor connection with installation of requisite adapters required if connecting to VGA/DVI/HDMI monitors. Dual display function is also supported. Figure 1-4: DisplayPort Connector Signal Signal CN_DDPx0+ CN_DDPx3- CN_DDPx0- CN_DDPx_AUX_SEL CN_DDPx1+ CN_DDPx_CONFIG2 CN_DDPx_AUX+ CN_DDPx1- CN_DDPx2+ CN_DDPx_AUX- CN_DDPx_HPD...

  • Page 22: Gpib Connector

    1.3.2 GPIB Connector The GPIB connector is a micro D-sub 25P connector, controlling external bench-top instruments. Connection to other instruments requires the optional ACL-IEEE488-MD1-A cable. The onboard GPIB controller provides: Full compatibility with IEEE 488 standard  Up to 1.5 MB/s data transfer rates ...

  • Page 23: Reset Button

    PXIe-3988 1.3.3 Reset Button The reset button, activated by insertion of any pin-like implement, executes a hard reset for the PXIe-3988. 1.3.4 LED Indicators Three LED indicators on the faceplate indicate operational status of the PXIe-3988, as follows. Figure 1-6: LED Indicators...

  • Page 24: Usb 2.0 Ports

    1.3.5 USB 2.0 Ports The PXIe-3988 provides four USB 2.0 ports via USB Type-A con- nectors on the faceplate, all compatible with hi-speed, full-speed and low-speed USB devices. Supported boot devices include USB flash drive, USB floppy, USB CD-ROM, and others, with boot pri- ority and device settings configured in BIOS.

  • Page 25: Gigabit Ethernet Ports

    PXIe-3988 1.3.6 Gigabit Ethernet Ports Dual Gigabit Ethernet connection is provided on the PXIe-3988 front panel. 1000Base-T Signal 100/10Base-T Signal MDI0+ MDI0- MDI1+ MDI2+ Reserved MDI2- Reserved MDI1- MDI3+ Reserved MDI3- Reserved Table 1-6: Ethernet Port Pin Assignments Each Ethernet port includes two LED indicators, one Active/Link indicator and one Speed indicator, functioning as follows.

  • Page 26: Usb 3.0 Ports

    1.3.7 USB 3.0 Ports The PXIe-3988 provides two Type-A USB 3.0 ports on the front panel, supporting SuperSpeed, Hi-Speed, full-speed, and low- speed downstream transmission. Multiple boot devices, including USB flash, USB external HD, and USB CD-ROM drives are sup- ported, with boot priority configured in BIOS.

  • Page 27: Onboard Connections And Settings

    PXIe-3988 1.3.9 Onboard Connections and Settings Figure 1-8: Onboard Configuration Clear CMOS switch SATA connector System battery Table 1-9: Onboard Configuration Legend Introduction...
  • Page 28 This page intentionally left blank. Introduction...

  • Page 29: Getting Started

    PXIe-3988 Getting Started This chapter describes procedures for installing the PXIe-3988 and making preparations for its operation, including hardware and software setup. Note that the PXIe controller is shipped with RAM and an SSD preinstalled. Contact ADLINK or an authorized dealer if there are any problems during the installation.

  • Page 30: Operating System Installation

    2.2 Operating System Installation For more detailed information about the operating system, refer to the documentation provided by the operating system manufac- turer. Preferred/supported operating systems for the PXIe control- ler are: Windows 10 64-bit  For other OS support, contact ADLINK ...

  • Page 31: Installation Environment

    PXIe-3988 2.2.1 Installation Environment When preparing to install any equipment described in this man- ual, first refer to Important Safety Instructions. Only install equipment in well lit areas on flat, sturdy surfaces with access to basic tools such as flat- and cross-head screw- drivers, preferably with magnetic heads as screws and stand- offs are small and easily misplaced.

  • Page 32: Installing The Pxie-3988

    2.2.2 Installing the PXIe-3988 1. Remove all screw caps (x4). Getting Started...
  • Page 33 PXIe-3988 2. Release the red locking lever. 3. Depress the latch. 4. Locate the system controller slot of the chassis (Slot 1). Getting Started...
  • Page 34 PXIe-3988 into the chas- sis, as shown. 6. Elevate the latch until the PXIe-3988 is fully seated in the chassis backplane. The alignment pin on the rear of the latch can be threaded into the best fit alignment port in the chassis rail.

  • Page 35: Replacing The Hard Drive Or Solid State Drive

    PXIe-3988 2.2.3 Replacing the Hard Drive or Solid State Drive The PXIe controller provides a SATA 3.0 port with a pre-installed 2.5" SATA hard drive or solid state drive. Replacing the HDD or SSD is accomplished as follows. 1. Locate the five screws attaching the hard drive housing to the PXIe controller, as shown.

  • Page 36: Replacing The Battery Backup

    PXI system. 2.2.4 Replacing the Battery Backup The PXIe-3988 is provided with a 3.0 V “coin cell” lithium battery, replacement of which is as follows. 1. Turn off the PXI chassis. 2. Remove the PXIe controller from the chassis. Observe all anti-static precautions.

  • Page 37: Clearing Cmos

    PXIe-3988 4. Place a fresh identical battery (CR2032 or equivalent) in the socket, ensuring that the positive pole (+) is facing upwards. The battery is most easily seated by first being inserted under the positive retaining clip, and then pushed downward at the negative retaining clip. The bat- tery should easily snap into position.
  • Page 38 4. Remount the controller into the PXI chassis. 5. Press <Delete> or <ESC> to enter BIOS Setup when the splash logo appears. 6. Press <F9> to load optimized defaults in BIOS Setup. 7. Modify the system date and time. 8. Press <F10> to save configuration and exit. Getting Started...

  • Page 39: Driver Installation

    Driver Installation Windows 10 already carries most of the device drivers required by the PXIe-3988. Others can be downloaded from the ADLINK web- site after clicking “Driver” on any of the product pages for this series (the files are exactly the same for each product): www.adlinktech.com/Products/PXI_PXIe/PXIControllers/PXIe-3988...
  • Page 40 This page intentionally left blank. Driver Installation...

  • Page 41: A Appendix: Pxi Trigger I/O Functions

    PXI trigger bus on the backplane. API files are located in the installation directory of the PXI Trigger I/O driver. A.1 Data Type The PXIe-3988 library uses these data types in pxitrigio.h in the directory X:\ADLINK\MAPS Core\PXI\PXIe Trigger IO\Include. It is recommended that you use these data types in your application programs.
  • Page 42 Type Type Description Range C/C++ Pascal Visual Basic (for 32-bit (Delphi) compiler) 32-bit single- -3.402823E38 precision float Single Single floating-point 3.402823E38 1.7976831348 64-bit double- 62315E308 precision double Double Double floating-point 1.7976831348 62315E309 Table A-1: Data Type PXI Trigger I/O Functions...

  • Page 43: Function Library

    PXIe-3988 A.2 Function Library This section provides detailed definitions of the functions available in the PXIe-3988 function library. Each function includes a descrip- tion, list of supported cards, syntax, parameter list and Return Code information. A.2.1 TRIG_Init Description Initializes trigger I/O function of PXIe-3988 controller.

  • Page 44: Trig_Close

    A.2.2 TRIG_Close Description Closes trigger I/O function of PXIe-3988 controller, releas- ing resources allocated for the trigger I/O function. Users must invoke TRIG_Close before exiting the application. Syntax C/C++ I16 TRIG_Close() Visual Basic TRIG_Close() As Integer Parameter None Return Code...

  • Page 45: Trig_Setsofttrg

    PXIe-3988 A.2.3 TRIG_SetSoftTrg Description Generates a TTL trigger signal to the trigger I/O SMB con- nector on the faceplate or the PXI trigger bus on the back- plane by software command. Syntax C/C++ I16 TRIG_SetSoftTrg(U8 Status) Visual Basic TRIG_SetSoftTrg (ByVal...

  • Page 46: Trig_Trigger_Route

    A.2.4 TRIG_Trigger_Route Description Routes the trigger signal between the trigger I/O SMB con- nector on the faceplate and the PXI trigger bus on the back- plane. This function also allows routing of the software- generated trigger signal to SMB connector or trigger bus. Syntax C/C++ I16 TRIG_Trigger_Route (U32 source, U32 dest,...
  • Page 47 PXIe-3988 dest Destination of trigger routing can be one of the following. Available value Description PXI_TRIG_VAL_SMB SMB connector on the faceplate PXI_TRIG_VAL_TRIG0 PXI trigger bus #0 PXI_TRIG_VAL_TRIG1 PXI trigger bus #1 PXI_TRIG_VAL_TRIG2 PXI trigger bus #2 PXI_TRIG_VAL_TRIG3 PXI trigger bus #3...

  • Page 48: Trig_Trigger_Clear

    A.2.5 TRIG_Trigger_Clear Description Clears the trigger routing setting. Syntax C/C++ I16 TRIG_Trigger_Clear() Visual Basic TRIG_Trigger_Clear() As Integer Parameters None Return Code ERR_NoError ERR_BoardNoInit ERR_Trigger_Clr PXI Trigger I/O Functions...

  • Page 49: Trig_Getsofttrg

    PXIe-3988 A.2.6 TRIG_GetSoftTrg Description Acquires the current software trigger state, with default state after system boot of Logic Low. Syntax C/C++ I16 TRIG_GetSoftTrg(U8 *Status) Visual Basic TRIG_GetSoftTrg (status As Byte) As Integer Parameters Status Returns the logic level of software trigger signal.

  • Page 50: Trig_Trigger_Route_Query

    A.2.7 TRIG_Trigger_Route_Query Description Acquires the current trigger signal routing path. Syntax C/C++ TRIG_Trigger_Route_Query (U32* source, U32* dest, U32* halfway) Visual Basic TRIG_Trigger_Route_Query (source As Long, dest As Long, halfway As Long) As Integer Parameters source Returns to the current source of trigger routing, with possi- ble values including Available Definition Defined Value...
  • Page 51 PXIe-3988 dest Returns to the current destination of trigger routing, with possible values including: Available Definition Defined Value PXI_TRIG_VAL_NONE PXI_TRIG_VAL_SMB PXI_TRIG_VAL_TRIG0 PXI_TRIG_VAL_TRIG1 PXI_TRIG_VAL_TRIG2 PXI_TRIG_VAL_TRIG3 PXI_TRIG_VAL_TRIG4 PXI_TRIG_VAL_TRIG5 PXI_TRIG_VAL_TRIG6 PXI_TRIG_VAL_TRIG7 halfway Returns to the current halfway point of trigger routing, with possible values including:...

  • Page 52: Trig_Getdriverrevision

    A.2.8 TRIG_GetDriverRevision Description Acquires the PXI Trigger software driver version; format of the version number is major.minor1.minor2. Syntax C/C++ TRIG_GetDriverRevision(unsigned short *major, unsigned short *minor1, unsigned short *minor2) Visual Basic TRIG_GetDriverRevision (major Integer, minor1 As Integer, minor2 As Integer) As Inte- Parameters major Returns the major version number of the pxi trigger software...

  • Page 53: B Appendix: Bios Setup

    PXIe-3988 Appendix B BIOS Setup B.1 Entering the BIOS 1. Power on or reboot the PXIe-3988 controller. 2. Press the <Delete> or <Esc> key when the controller beeps. This should be concurrent with the main startup screen. The BIOS setup program loads after a short delay.

  • Page 54: Navigation

    B.2 Navigation The BIOS setup utility uses a key-based navigation system called hot keys. Most hot keys can be used at any time during navigation. Key(s) Function Right Arrow, Left Arrow Moves between different setup menus Up Arrow, Down Arrow Moves between options within a setup menu Opens a sub-menu or displays all available settings <Enter>...

  • Page 55: Menu Structure

    PXIe-3988 B.3 Menu Structure This section presents the primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The sub-sections that follow provide further details for each top-level menu and sub-menu and the setting options for each menu item.

  • Page 56: Main

    B.4 Main The Main Menu provides read-only information about your system and also allows you to set the System Date and Time. Refer to the tables below for details about each section/sub-menu. B.4.1 BIOS Information Feature Options Description BIOS Vendor Info only American Megatrends BIOS Version...

  • Page 57: System Date And Time

    PXIe-3988 B.4.2.1 Board Information Board Information Options Description Serial Number Info only Displays SEMA S/N Manufacturing Date Info only Displays SEMA manufacture date Last Repair Date Info only Displays last SEMA repair date MAC ID Info only Displays SMC MAC ID B.4.2.2...

  • Page 58: Advanced

    B.5 Advanced Provides settings for most user interfaces in the system. B.5.1 CPU Configuration Feature Options Description Type Info only Displays CPU type Microcode Revision Info only Displays microcode revision Displays CPU operating Speed Info only frequency L1 Data Cache Info only Displays cache info L1 Instruction Cache...
  • Page 59 PXIe-3988 Feature Options Description Allows support for more than Disabled Intel® SpeedStep(TM) Enabled two frequency ranges Enable/Disable dynamically Intel® Speed Shift Disabled adjust processor operating Technology Enabled frequency and voltage Disabled Turbo Mode Enables/disables turbo mode Enabled Configures TDP Mode as...

  • Page 60: Memory Configuration

    B.5.2 Memory Configuration Feature Options Description Displays Memory Reference Code Memory RC Version Info only version Memory Frequency Info only Displays memory frequency Memory voltage Info only Displays memory voltage Memory Timings Info only Displays memory timings (tCL-tRCD-tRP-RAS) Channel 0 slot 0 Info only Displays Channel 0 Channel 1 slot 0...

  • Page 61: Usb Configuration

    PXIe-3988 B.5.4 USB Configuration Feature Options Description USB Module Version Info only USB Devices Info only Lists USB-connected peripheral devices USB Controllers Info only Displays USB Controller type USB Devices Info only Displays USB Devices XHCI Compliance Disabled Enables/Disables XHCI compliance mode...

  • Page 62: Tpm 2.0 Configuration

    B.5.5 TPM 2.0 Configuration Feature Options Description Security Device Disable Enable or disable BIOS support for Support security device Enable Active PCR Banks Info only Available PCR Info only Banks Enabled SHA-1 PCR Bank Enable or disable SHA-1 PCR Bank Disabled Enabled SHA-256 PCR Bank...

  • Page 63: Onboard Devices Configuration

    PXIe-3988 B.5.6 Onboard Devices Configuration Feature Options Description LAN Port Configuration Enables/disables onboard I219 LAN Enabled LAN1 Controller Disabled controller Enables/disables onboard I210 LAN Enabled LAN2 Controller Disabled controller UART Mode Control Configuration RS232 Selects serial port mode, from COM1 Control...

  • Page 64: Advanced Power Management

    B.5.8 Advanced Power Management Feature Options Description Enables/disables system wake on alarm event, from among Disabled Fixed Time, where system RTC Wake System from S5 Fixed Time wakes at the setting time, and Dynamic Time Dynamic Time, in which system wakes at setting time later Enables/disables PCI Express Enabled...

  • Page 65: System Management

    PXIe-3988 B.5.10 System Management Feature Options Description SEMA Firmware Info only Displays SEMA firmware Build Date Info only Displays SEMA firmware build date SEMA Bootloader Info only Displays SEMA boot loader Build Date Info only Displays SEMA boot loader build date B.5.11 Flags...

  • Page 66: Power Consumption

    B.5.12 Power Consumption Feature Options Description Current Input Current Info only Displays input current Current Input Power Info only Displays input power Displays actual voltage of the power rail VCORE Info only VCC_CORE Displays actual voltage of the power rail VCC-GT Info only VCC-GT...

  • Page 67: Hardware Health Configuration

    PXIe-3988 B.5.13 Hardware Health Configuration Feature Options Description Ambient temp of PCIe Ambient temperature near PCIe Info only switch switch Core temp of PCIe switch Info only Core temperature of PCIe switch +3.3V(System) Info only System +3.3V voltage +5V(System) Info only...

  • Page 68: Chipset

    B.6 Chipset B.6.1 System Agent (SA) Configuration Feature Options Description SA PCIe Code Version Info only Displays SA PCIe code version Displays virtualization VT-d Info only technology for directed I/O (VT-d) support status. B.6.1.1 PEG Port Configuration Feature Options Description PEG Port Configuration PEG 0:1:0 Info only...

  • Page 69: Pch-Io Configuration

    PXIe-3988 Feature Options Description PEG 0:6:0 Info only Link lanes and mode Auto Auto/Enable/Disable the PCI Enable root port Disable Express bus root port Enable Auto Sets maximum PCI Express link Gen1 Max Link speed capability of the PCI Express...
  • Page 70 B.6.2.2 SATA and RST Configuration Feature Options Description Enabled SATA Controller(s) Enables/disables SATA device Disabled Determines how SATA AHCI SATA Mode Selection controller(s) operate. Enabled Test Mode Enable/Disable SATA Test Mode (Loop Back). Disabled Software Feature Mask Configuration Enable PCH to aggressively Enabled Aggressive LPM support Disabled...

  • Page 71: Security

    PXIe-3988 B.7 Security Feature Options Description Provides information about password characteristics as Password Description Info only well as password length requirements: min. 3, max. 20 If ONLY the Administrator Password is set, then this only Administrator Password Enter password limits access to BIOS Setup and...

  • Page 72: Boot

    B.8 Boot Feature Options Description Boot Configuration Number of seconds to wait for setup activation key; to wait Setup Prompt Timeout indefinitely, set to 65536 (0xFFFF) Set keyboard NumLock state at Bootup NumLock State boot Disabled Enable or disable Quiet Boot Quiet Boot option Enabled...

  • Page 73: Csm

    PXIe-3988 B.8.1 Feature Options Description Enabled Determines whether CSM will CSM Support launch Disabled CSM16 Module Displays the CSM16 module Info only Version version number UPON REQUEST means GA20 can be disabled using BIOS services, Upon Request GateA20 Active ALWAYS means GA20 cannot be Always disabled;...

  • Page 74: Save & Exit

    B.9 Save & Exit Feature Options Description Save Options Saves changes and exits system Save Changes and Exit setup Discards changes and exits system Discard Changes and Exit setup Save Changes and Reset Saves changes and resets system Discard Changes and Discards changes and resets Reset system...

  • Page 75: C Appendix: Dual Bios

    PXIe-3988 Appendix C Dual BIOS Dual BIOS is a backup function that maintains normal operation of the PXIe system module when unexpected boot failure occurs under the default BIOS. Dual BIOS consists of a main BIOS, a backup BIOS, and an independent controller. In normal boot, the main BIOS powers on and boots the system into the OS, moni- tored by the independent controller.
  • Page 76 This page intentionally left blank. Dual BIOS...

  • Page 77: D Appendix: Legacy Boot Mode Settings

    PXIe-3988 Appendix D Legacy Boot Mode Settings UEFI boot mode is default for the PXIe-3988 BIOS. To boot in legacy boot mode, change related settings in the BIOS menu: 1. Power on and press <DEL> or <ESC> to enter BIOS menu 2.
  • Page 78 This page intentionally left blank. Legacy Boot Mode Settings...

  • Page 79: Important Safety Instructions

    PXIe-3988 Important Safety Instructions For user safety, please read and follow all instructions, Warnings, Cautions, and Notes marked in this manual and on the associated device before handling/operating the device, to avoid injury or damage. S'il vous plaît prêter attention stricte à tous les avertissements et mises en garde figurant sur l'appareil , pour éviter des blessures...
  • Page 80 A Lithium-type battery may be provided for uninterrupted  backup or emergency power. Risk of explosion if battery is replaced with one of an incorrect type; please dispose of used batteries appropriately. Risque d’explosion si la pile est remplacée par une autre de CAUTION: type incorrect.

  • Page 81: Getting Service

    San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co., Ltd. 300 Fang Chun Rd., Zhangjiang Hi-Tech Park Pudong New Area, Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com...

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