3.3.3
LVDS
Signal
Pin #
LVDS_A0+
A71
LVDS_A0-
A72
LVDS_A1+
A73
LVDS_A1-
A74
LVDS_A2+
A75
LVDS_A2-
A76
LVDS_A3+
A78
LVDS_A3-
A79
LVDS_A_CK+
A81
LVDS_A_CK-
A82
LVDS_B0+
B71
LVDS_B0-
B72
LVDS_B1+
B73
LVDS_B1-
B74
LVDS_B2+
B75
LVDS_B2-
B76
LVDS_B3+
B77
LVDS_B3-
B78
LVDS_B_CK+
B81
LVDS_B_CK-
B82
LVDS_VDD_EN
A77
LVDS_BKLT_EN
B79
LVDS_BKLT_CTRL
B83
LVDS_I2C_CK
A83
LVDS_I2C_DAT
A84
3.3.4
Gigabit Ethernet
Gigabit Ethernet
Pin #
GBE0_MDI0+
A13
GBE0_MDI0-
A12
GBE0_MDI1+
A10
GBE0_MDI1-
A9
GBE0_MDI2+
A7
GBE0_MDI2-
A6
GBE0_MDI3+
A3
GBE0_MDI3-
A2
GBE0_ACT#
B2
GBE0_LINK#
A8
GBE0_LINK100#
A4
GBE0_LINK1000#
A5
GBE0_CTREF
A14
Express-HLE
Description
LVDS Channel A differential pairs
LVDS Channel A differential clock
LVDS Channel B differential pairs
LVDS Channel B differential clock
LVDS panel power enable
LVDS panel backlight enable
LVDS panel backlight brightness control
DDC lines used for flat panel detection and control.
DDC lines used for flat panel detection and control.
Description
Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs
0, 1, 2, 3. The MDI can operate in 1000, 100, and 10Mbit/sec modes.
Some pairs are unused in some modes according to the following:
1000BASE-T
100BASE-TX
MDI[0]+/-
B1_DA+/-
MDI[1]+/-
B1_DB+/-
MDI[2]+/-
B1_DC+/-
MDI[3]+/-
B1_DD+/-
Gigabit Ethernet Controller 0 activity indicator, active low.
Gigabit Ethernet Controller 0 link indicator, active low.
Gigabit Ethernet Controller 0 100Mbit/sec link indicator, active low.
Gigabit Ethernet Controller 0 1000Mbit/sec link indicator, active low.
Reference voltage for Carrier Board Ethernet channel 1 and 2 magnetics
center tap. The reference voltage is determined by the requirements of the
Module PHY and may be as low as 0V and as high as 3.3V. The reference
voltage output shall be current limited on the Module. In the case in which
the reference is shorted to ground, the current shall be 250 mA or less.
I/O
O LVDS
O LVDS
O LVDS
O LVDS
O 3.3V
O 3.3V
O 3.3V
O 3.3V
I/O 3.3V
10BASE-T
TX+/-
TX+/-
RX+/-
RX+/-
PU/PD
Comment
Realtek ePD to LVDS
PD 100K
requirement
PU 2k2 3.3V
PU 2k2 3.3V
I/O
PU/PD
I/O Analog
O 3.3VSB
PU 10k
3.3VSB
O 3.3VSB
O 3.3VSB
O 3.3VSB
GND min
3.3V max
Comment
Twisted pair
signals for
external
transformer.
Page 17
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