Lvds Power Selection (Jp1); Pci Signaling Voltage (Vi/O) Selection (Jp4); Clear Cmos (Jp5); Clock Shift Of Tft Lcd (Jp6) - Aaeon GENE-6315 User Manual

Subcompact board
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S u b C o m p a c t B o a r d

2.7 LVDS Power Selection (JP1)

JP1
1-2
2-3

2.8 PCI Signaling Voltage (VI/O) Selection (JP4)

JP4
1-2
2-3

2.9 Clear CMOS (JP5)

JP5
1-2
2-3

2.10 Clock Shift of TFT LCD (JP6)

JP6
1-2
2-3
Function
+5V
+3.3V (Default)
Function
+5V
+3.3V (Default)
Function
Protected (Default)
Clear
Function
Shift (Default)
Non-Shift
G E N E - 6 3 1 5
Chapter 2 Quick Installation Guide
2- 11

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