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Lattice Semiconductor
• On-board and external reference clock sources
• Interchangeable clock oscillators
• ORCAstra demonstration software interface via standard ispVM JTAG connection
• Various high-speed layout structures
• User-defined input and output points
• SMA connectors included (10) for high-speed clock or data interfacing
• Performance monitoring via test headers, LEDs and switches
This user's guide includes top-level functional descriptions of the various portions of the evaluation board, descrip-
tions of the on-board connectors, diodes and switches and a complete set of schematics of the board. Figure 2
shows the functional partitioning of the board.
Additional Resources
For additional information and resources related to this board, including updated documentation and hard-
ware/software demos, please see the Lattice web site at
ate page for this board.
A PCI Express demonstration is also available on-line, including a GUI and drivers for a PCI Express solution using
this board.
Lattice makes its best effort to provide evaluation board designs to help users with evaluation and development.
However it remains the user's responsibility to verify proper and reliable operation of Lattice products in their end
application by consulting documentation provided by Lattice. Differences in component selection and/or PCB layout
in the user's application may significantly affect circuit performance and reliability.
Figure 2. Evaluation Board Block Diagram
PCI Express Card
Edge Fingers
LatticeSC Device
This board features a LatticeSC FPGA with a 1.2V core supply. It can accommodate all pin compatible LatticeSC
devices in the 1152-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the
ticeSC/M Family Data
Sheet.
LatticeSC PCI Express x4 Evaluation Board
www.latticesemi.com/boards
PCI Express x1
Cable Connector
LatticeSC
1152 fcBGA
PCI Express x4
DDR2
Memory
84 fBGA
3
and navigate to the appropri-
PCI Express x1
Cable Connector
LVDS
Bus Loop
LVDS SMAs
4-bit
Input/Output
User's Guide
Lat-
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