GE D60 Instruction Manual page 227

5 SETTINGS
the breaker fail scheme. This can also occur in breaker-and-a-half or ring bus configurations where the first breaker closes
into a fault; the protection trips and attempts to initiate breaker failure for the second breaker, which is in the process of
closing, but does not yet have current flowing through it.
When the scheme is initiated, it immediately sends a trip signal to the breaker initially signaled to trip (this feature is usually
described as Re-Trip). This reduces the possibility of widespread tripping that results from a declaration of a failed breaker.
DETERMINATION OF A BREAKER FAILURE CONDITION:
The schemes determine a breaker failure condition via three 'paths'. Each of these paths is equipped with a time delay,
after which a failed breaker is declared and trip signals are sent to all breakers required to clear the zone. The delayed
paths are associated with Breaker Failure Timers 1, 2, and 3, which are intended to have delays increasing with increasing
timer numbers. These delayed paths are individually enabled to allow for maximum flexibility.
Timer 1 logic (Early Path) is supervised by a fast-operating breaker auxiliary contact. If the breaker is still closed (as indi-
cated by the auxiliary contact) and fault current is detected after the delay interval, an output is issued. Operation of the
breaker auxiliary switch indicates that the breaker has mechanically operated. The continued presence of current indicates
that the breaker has failed to interrupt the circuit.
Timer 2 logic (Main Path) is not supervised by a breaker auxiliary contact. If fault current is detected after the delay interval,
an output is issued. This path is intended to detect a breaker that opens mechanically but fails to interrupt fault current; the
logic therefore does not use a breaker auxiliary contact.
The Timer 1 and 2 paths provide two levels of current supervision, Hi-set and Lo-set, that allow the supervision level to
change from a current which flows before a breaker inserts an opening resistor into the faulted circuit to a lower level after
resistor insertion. The Hi-set detector is enabled after timeout of Timer 1 or 2, along with a timer that will enable the Lo-set
detector after its delay interval. The delay interval between Hi-set and Lo-set is the expected breaker opening time. Both
current detectors provide a fast operating time for currents at small multiples of the pickup value. The overcurrent detectors
are required to operate after the breaker failure delay interval to eliminate the need for very fast resetting overcurrent detec-
tors.
Timer 3 logic (Slow Path) is supervised by a breaker auxiliary contact and a control switch contact used to indicate that the
breaker is in/out of service, disabling this path when the breaker is out of service for maintenance. There is no current level
check in this logic as it is intended to detect low magnitude faults and it is therefore the slowest to operate.
OUTPUT:
The outputs from the schemes are:
• FlexLogic™ operands that report on the operation of portions of the scheme
• FlexLogic™ operand used to re-trip the protected breaker
• FlexLogic™ operands that initiate tripping required to clear the faulted zone. The trip output can be sealed-in for an
adjustable period.
• Target message indicating a failed breaker has been declared
• Illumination of the faceplate Trip LED (and the Phase A, B or C LED, if applicable)
MAIN PATH SEQUENCE:
ACTUAL CURRENT MAGNITUDE
0
AMP CALCULATED CURRENT MAGNITUDE
0
PROTECTION OPERATION BREAKER INTERRUPTING TIME
(ASSUMED 1.5 cycles)
BREAKER FAILURE TIMER No. 2 (±1/8 cycle)
INITIATE (1/8 cycle)
FAULT
OCCURS
0 1 2
GE Multilin
FAILED INTERRUPTION
Rampdown
(ASSUMED 3 cycles)
(Assumed 2 Cycles)
BREAKER FAILURE CURRENT DETECTOR PICKUP (1/8 cycle)
BREAKER FAILURE OUTPUT RELAY PICKUP (1/4 cycle)
3 4 5
Figure 5–81: BREAKER FAILURE MAIN PATH SEQUENCE
D60 Line Distance Relay
CORRECT INTERRUPTION
MARGIN BACKUP BREAKER OPERATING TIME
(Assumed 3 Cycles)
6 7 8
5.5 GROUPED ELEMENTS
cycles
9 10 11
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