Onkyo DV-CP702 Service Manual page 72

IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION
Q2002: S-80127CNMC-JKM VOLTAGE DETECTOR (12.7V N-ch open drain, Active L: out)
Q702: S-80130CLMC-JKM VOLTAGE DETECTOR (13.0V CMOS, Active L: out)
PIN CONFIGURATION
5
Top view
1 2
BLOCK DIAGRAM
VDD
VSS
PIN DESCRIPTION
4
No.
1
2
3
4
5
*1. NC pin is electrically open.
3
DELAY CIRCUIT
Oscillator
counter
VREF
timer
DS
Symbol Description
DS ON/OFF switch for delay time
VSS GND
*1
NC Non-connection
OUT Voltage detection output pin
VDD Voltage input pin
OUT
DV-CP702