Onkyo DV-CP702 Service Manual page 71

IC BLOCK DIAGRAM/ TERMINAL DESCRIPTION
Q401: PCM1742KE DIGITAL-TO-ANALOG CONVERTER
BLOCK DIAGRAM
1
BCK
Audio
3
LRCK
Serial
Port
2
DATA
15
ML
Serial
14
MC Control
Port
13
MD
System Clock
16
SCK
Manager
PIN CONFIGURATION
TOP VIEW
BCK 1
DATA 2
LRCK 3
DGND 4
PCM1742
V 5
DD
V 6
CC
V L 7
OUT
V R 8
OUT
24-Bit, 192kHz Sampling
Enhanced Multilevel, Delta-Sigma, Audio
4x/8x
Enhanced
Over sampling
Multilevel
Digital Filter
Delta-Sigma
with
Modulator
Function
Controller
System Clock
Zero Detect
PIN ASSIGNMENTS
16 SCK
15 ML
14 MC
13 MD
12 ZEROL/NA
11 ZEROR/ZEROA
10 V
COM
9 AGND
SSOP
NOTES: (1) Schmitt-trigger input, 5V tolerant. (2) Schmitt-trigger with internal
pull-down, 5V tolerant.
Output Amp and
DAC
Low-Pass Filter
Output Amp and
DAC
Low-Pass Filter
Power Supply
PIN NAME TYPE FUNCTION
1 BCK IN Audio Data Bit Clock Input.
2 DATA IN Audio Data Digital Input.
3 LRCK IN L-Channel and R-Channel Audio Data Latch En-
able Input.
4 DGND - Digital Ground
5 V - Digital Power Supply, +3.3V
DD
6 V - Analog Power Supply, +5V
CC
7 V L OUT Analog Output for L-Channel.
OUT
8 V R OUT Analog Output for R-Channel.
OUT
9 AGND - Analog Ground
10 V - Common Voltage Decoupling.
COM
11 ZEROR/ OUT Zero Flag Output for R-Channel/Zero Flag Output
ZEROA for L/R-Channel.
12 ZEROL/NA OUT Zero Flag Output for L-Channel/No Assign.
13 MD IN Mode Control Data Input.
14 MC IN Mode Control Clock Input.
15 ML IN Mode Control Latch Input.
16 SCK IN System Clock Input.
DV-CP702
7
V L
OUT
10
V
COM
8
V R
OUT
(1)
(1)
(1)
(2)
(2)
(2)