Ddr3 Memory Interface; 2.2.2.1 Supported Ddr3 Components; 2.2.2.2 Row And Column Addressing; Table 2-3 Supported Ddr3 Components - AMD 780E Technical Reference Manual

Side-Port Memory Interface
A13 A12 A11 A10 A9
Row
P23
Column
Row
P24 P23
Column
Note: PC = precharge flag
2.2.2

DDR3 Memory Interface

The RS780E memory controller supports up to 128MB of dedicated side-port frame buffer DDR3 memory. It supports a
single rank of DDR3 device in 16-bit memory configuration. It supports device sizes of 512 and 1024 Mbits, and a device
width of x16. A wide range of DDR3 timing parameters, configurations, and loadings are programmable via the RS780E
memory controller configuration registers.

2.2.2.1 Supported DDR3 Components

The memory controller supports DDR3 SDRAM chips in several configurations. These chips are organized in banks,
rows (or pages), and columns.

Table 2-3 Supported DDR3 Components

Config Mbits
32Mbx16 512
64Mbx16 1024

2.2.2.2 Row and Column Addressing

Table 2-4 shows how the physical address P (after taking out the bank bit) is used to provide the row and column
addressing for each size of DDR3 memories.

Table 2-4 DDR3 Memory Row and Column Addressing

A13 A12 A11 A10 A9
Row P23
Column -
Row P23 P14
Column -
Note: PC = precharge flag
© 2009 Advanced Micro Devices, Inc.
Proprietary
A8
64Mbx16 devices
P14 P13 P12 P11
- - PC P10 P9
128Mbx16 devices
P14 P13 P12 P11
- - PC P10 P9
Table 2-3 lists the supported memory components.
DDR3 SDRAM
CS Mode Bank Bits Row Bits
9 3
11 3
A8 A7
32Mbx16 devices
P14 P13 P12 P11 P22
- PC P10 P9 P8
64Mbx16 devices
P13 P12 P11 P22
- PC P10 P9 P8
Address
A7 A6 A5 A4 A3
P22 P21 P20 P19 P18
P8 P7 P6 P5 P4
P22 P21 P20 P19 P18
P8 P7 P6 P5 P4
Col Bits
12 10
13 10
Address
A6 A5 A4 A3
P21 P20 P19 P18
P7 P6 P5 P4
P21 P20 P19 P18
P7 P6 P5 P4
A2 A1 A0
P17 P16 P15
P3 P2 P1
P17 P16 P15
P3 P2 P1
Mbytes
64
128
A2 A1 A0
P17 P16 P15
P3 P2 P1
P17 P16 P15
P3 P2 P1
45732 AMD 780E Databook 3.10
2-5