Dvi/Hdmi; Dvi/Hdmi™ Data Transmission Order And Signal Mapping; Figure 2-8 Data Transmission Ordering For The Tmds Interfaces - AMD 780E Technical Reference Manual

DVI/HDMI™

2.5 DVI/HDMI™
2.5.1 DVI/HDMI™ Data Transmission Order and Signal Mapping
The RS780E contains two dual-link TMDS interfaces, multiplexed on the PCI Express
"TMDS Interface Multiplexed on the PCI Express® Graphics Lanes‚' on page 3-10
section 3.8, "LVTM Interface in TMDS Mode‚' on page 3-9
link. Figure 2-8 shows the transmission ordering of the signals on the interfaces.
TXCP
TXCM
TX0P
TX0M
TX1P
TX1M
TX2P
TX2M
For dual-link mode, which is for DVI only, the same transmission order applies to data channels on the second link, with
the first link transmitting data for even pixels and the second link for odd pixels. See
The signal mapping for the transmission is shown in
© 2009 Advanced Micro Devices, Inc.
Proprietary
Various control and audio (for HDMI™ only) signals
Depending upon state of HSYNC and VSYNC
Various control and audio (for HDMI only) signals Depending upon state of PLL_SYNC and CTL1
Depending upon state of CTL2 and CTL3
Various control and audio (for HDMI only) signals

Figure 2-8 Data Transmission Ordering for the TMDS Interfaces

), which support clock frequencies of up to 162 MHz on each
TB0 TB1 TB2 TB3 TB4
Depending upon encoded Blue channel pixel data
Encoded Blue Channel Pixel Data
TG0 TG1 TG2 TG3 TG4
Depending upon encoded Green channel pixel data Encoded Green Channel Pixel Data
TR0 TR1 TR2 TR3 TR4
Depending upon encoded Red channel pixel data
Encoded Red Channel Pixel Data
Table 2-9 (single link) and
®
graphics lanes (see
) and on the LVTM interface (see
TB5 TB6 TB7 TB8 TB9
TG5 TG6 TG7 TG8 TG9
TR5 TR6 TR7 TR8 TR9
Table 2-10 below for details.
Table 2-10 (dual-link DVI) below.
45732 AMD 780E Databook 3.10
section 3.9,
2-13