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AMD 780E Technical Reference Manual

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AMD 780E
Databook
Technical Reference Manual
Rev. 3.10
P/N: 45732_rs780e_ds_pub
© 2009 Advanced Micro Devices, Inc.

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  • Page 1 AMD 780E Databook Technical Reference Manual Rev. 3.10 P/N: 45732_rs780e_ds_pub © 2009 Advanced Micro Devices, Inc.
  • Page 2 AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur.

  • Page 3: Table Of Contents

    Table of Contents Chapter 1: Overview 1.1 Introducing the AMD 780E ..............................1-1 1.2 RS780E Features.................................1-2 1.2.1 CPU HyperTransport™ Interface.........................1-2 1.2.2 Memory Interface ..............................1-2 1.2.3 HyperMemory™............................1-2 1.2.4 PCI Express® Interface ............................1-3 1.2.5 A-Link Express II Interface..........................1-4 1.2.6 2D Acceleration Features .............................1-4 1.2.7...
  • Page 4 Maximum and Minimum Ratings........................5-1 5.1.2 DC Characteristics ............................... 5-2 5.2 RS780E Thermal Characteristics ............................5-7 5.2.1 RS780E Thermal Limits ............................5-7 5.2.2 Thermal Diode Characteristics ..........................5-8 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Table of Contents-2 Proprietary...
  • Page 5 VOH/VOL Pin List...............................7-6 Appendix A: Pin Listings A.1 RS780E Pin List Sorted by Ball Reference........................1-2 A.2 RS780E Pin List Sorted by Pin Name..........................1-7 Appendix B: Revision History © 2009 Advanced Micro Devices, Inc. AMD 780E Databook 3.10 Proprietary Table of Contents-3...
  • Page 6 Table of Contents This page is left blank intentionally. AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Table of Contents-4 Proprietary...
  • Page 7 Figure 6-1: Linked List for Capabilities ............................6-5 Figure 7-1: Example of a Generic XOR Tree ..........................7-2 Figure 7-2: Sample of a Generic VOH/VOL Tree ......................... 7-5 © 2009 Advanced Micro Devices, Inc. AMD 780E Databook 3.10 Proprietary List of Figures-1...
  • Page 8 List of Figures This page is left blank intentionally. AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. List of Figures-2 Proprietary...

  • Page 9: List Of Tables

    Table 5-11: DC Characteristics for the TMDS Interface Multiplexed on the PCI-E Gfx Lanes ............5-5 Table 5-12: Electrical Requirements for the LVTM Interface in LVDS Mode ................5-6 © 2009 Advanced Micro Devices, Inc. AMD 780E Databook 3.10 Proprietary List of Tables-1...
  • Page 10 Table 7-2: Example of an XOR Tree ..............................7-2 Table 7-3: RS780E XOR Tree ................................7-3 Table 7-4: Truth Table for the VOH/VOL Tree Outputs ........................7-5 Table 7-5: RS780E VOH/VOL Tree ...............................7-7 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. List of Tables-2 Proprietary...

  • Page 11: Chapter 1: Overview

    For optimal system and graphics performance, the RS780E supports a high speed HyperTransport™ interface to the AMD processor, running at a data rate of up to 4.4GT/s and supporting both HT 1.0 and HT 3.0 protocols. The RS780E is ideally suited for 64-bit operating systems, and supports platform configurations with greater than 4GB of ®...

  • Page 12: Rs780E Features

    RS780E Features Software Compatibility The graphics driver for the RS780E is fully compatible with all other Radeon class graphics controllers from AMD. A single driver can support multiple graphics configurations across AMD’s product lines, including the Radeon family and the AMD chipset family. In addition, this driver compatibility allows the RS780E to benefit immediately from AMD's ®...

  • Page 13: Pci Express® Interface

    RS780E Features * Note: Includes dedicated and shared memory. The amount of HyperMemory available is determined by various factors. For details, please consult your AMD CSS representative. ® 1.2.4 PCI Express Interface • Supports PCI-E Gen2 (version 2.0). • Optimized peer-to-peer and general purpose link performance.

  • Page 14: A-Link Express Ii Interface

    A-Link Express II Interface • One x4 A-Link Express II interface for connection to an AMD Southbridge. The A-Link Express II is a proprietary interface developed by AMD basing on the PCI Express Gen2 version 2.0 technology, with additional Northbridge-Southbridge messaging functionalities.

  • Page 15: Motion Video Acceleration Features

    H.264 implementation is based on the ISO/IEC 14496-10 spec. • VC-1 implementation is based on the SMPTE 421M spec. 1.2.9 Multiple Display Features General • Dual independent displays. Possible configurations are illustrated in Figure 1-2. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 16: Figure 1-2 Rs780E Multiple Display Options

    • Support for flat panel displays via VGA. • Configurable to support flat panel displays or TVs via DVI/HDMI. • Integrated HD audio controller for HDMI audio data. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 17: 1.2.10 Integrated Lvds/Tmds (Lvtm) Interface

    • Supports industry standard EIA-861B video modes including 480p, 720p, 1080i, and 1080p (for a full list of currently supported modes, contact you AMD CSS representative). Maximum resolutions supported by various modes are: • Single-link DVI: 1600x1200 @60Hz with standard timings, and 1920x1200 @60Hz with reduced blanking timings.

  • Page 18: 1.2.13 Integrated Hd Audio Controller And Codec

    • Supports PowerExpress™ and PowerPlay™ (enhanced with the PowerShift™ feature). • Supports dynamic lane reduction for the PCI-E graphics interface when coupled with an AMD-based graphics device, adjusting lane width according to required bandwidth. 1.2.16 PC Design Guide Compliance The RS780E complies with all relevant Windows Logo Program (WLP) requirements from Microsoft for WHQL certification.

  • Page 19: 1.2.17 Test Capability Features

    Drivers meet Microsoft's rigorous WHQL criteria and are suitable for systems with the "Designed for Windows" logos. • Comprehensive OS and API support. • Hot-key support (Windows ACPI 2.0 or AMD Event Handler Utility where appropriate). • Extensive power management support. • Rotation mode support in software.

  • Page 20: Branding Diagram

    Branding Diagram • Supports AMD OverDrive™ utility*. *Note: AMD’s product warranty does not cover damages caused by overclocking, even when overclocking is enabled via the AMD OverDrive utility. Branding Diagram AMD Logo RADEON IGP AMD Product Type YYWW Date Code*...

  • Page 21: Numeric Representation

    Chip Scale Package Digital to Analog Converter Dynamic Bus Inversion Display Data Channel. A VESA standard for communicating between a computer system and attached display devices. Double Data Rate © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 1-11...
  • Page 22 Chrominance (also CrCb). Corresponds to the color of a pixel. Unified Video Decoder UXGA Ultra Extended Graphics Array Vertical Blank Interval VESA Video Electronics Standards Association Video Graphics Adapter Voltage Regulation Module 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 1-12 Proprietary...

  • Page 23: Chapter 2: Functional Descriptions

    Figure 2-1 RS780E Internal Block Diagram Host Interface The RS780E is optimized to interface with AMD processors through the HyperTransport interface. This section presents an overview of the HyperTransport interface. For a detailed description of the interface, please refer to the ©...

  • Page 24: Figure 2-2 Host Interface Block Diagram

    RS780E. Detailed descriptions of the signals are given in section 3.3, “CPU HyperTransport™ Interface‚’ on page 3-5. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 25: Side-Port Memory Interface

    Because the memory controller supplies only one chip select signal, only devices with one chip select are supported. A wide range of DDR2 timing parameters, configurations, and loadings are programmable via the RS780E memory controller configuration registers © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 26: 2.2.1.1 Supported Ddr2 Components

    P (after taking out the bank bit) is used to provide the row and column addressing for each size of DDR2 memories. Table 2-2 DDR2 Memory Row and Column Addressing Address A13 A12 A11 A10 A9 16Mbx16 devices Column 32Mbx16 devices Column 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 27: Ddr3 Memory Interface

    Table 2-4 DDR3 Memory Row and Column Addressing Address A13 A12 A11 A10 A9 32Mbx16 devices Column 64Mbx16 devices P23 P14 P12 P11 Column Note: PC = precharge flag © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 28: Lvtm (Lvds/Tmds) Interface

    The RS780E’s LVTM (LVDS/TMDS) interface supports either an LVDS or a TMDS output. A custom video BIOS from AMD will configure the LVTM interface to drive out either LVDS or a TMDS signals as desired. A custom video BIOS and proper signal routing from the LVTM interface to a connector are the only requirements for the RS780E to support either an LVDS or a TMDS output on the LVTM interface.

  • Page 29: Lvds

    UP1C3 UP1C2 UP1C1 TXOUT_U1-/+ UP2C7 UP2C6 UP2C5 UP2C4 UP2C3 UP2C2 UP2C1 TXOUT_U2-/+ UP3C7 UP3C6 UP3C5 UP3C4 UP3C3 UP3C2 UP3C1 Figure 2-6 Single/Dual Channel 18-bit LVDS Data Transmission Ordering © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 30: Table 2-5 Lvds 18-Bit Tft Single Pixel Per Clock (Single Channel) Signal Mapping

    Table 2-5 LVDS 18-bit TFT Single Pixel per Clock (Single Channel) Signal Mapping TX Signal 18-bit LP1C1 LP1C2 LP1C3 LP1C4 LP1C5 LP1C6 LP1C7 LP2C1 LP2C2 LP2C3 LP2C4 LP2C5 LP2C6 LP2C7 LP3C1 LP3C2 LP3C3 LP3C4 LP3C5 HSYNC LP3C6 VSYNC LP3C7 ENABLE 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 31: Table 2-6 Lvds 18-Bit Tft Dual Pixel Per Clock (Dual Channel) Signal Mapping

    LP1C4 LP1C3 LP1C2 LP1C1 TXOUT_L1-/+ LP2C7 LP2C6 LP2C5 LP2C4 LP2C3 LP2C2 LP2C1 TXOUT_L2-/+ LP3C7 LP3C6 LP3C5 LP3C4 LP3C3 LP3C2 LP3C1 TXOUT_L3-/+ LP4C7 LP4C6 LP4C5 LP4C4 LP4C3 LP4C2 LP4C1 © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 32: Figure 2-7 Single/Dual Channel 24-Bit Lvds Data Transmission Ordering

    UP2C2 UP2C1 TXOUT_U2-/+ UP3C7 UP3C6 UP3C5 UP3C4 UP3C3 UP3C2 UP3C1 TXOUT_U3-/+ UP4C7 UP4C6 UP4C5 UP4C4 UP4C3 UP4C2 UP4C1 Figure 2-7 Single/Dual Channel 24-bit LVDS Data Transmission Ordering 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 2-10 Proprietary...

  • Page 33: Table 2-7 Lvds 24-Bit Tft Single Pixel Per Clock (Single Channel) Signal Mapping

    LP1C6 LP1C7 LP2C1 LP2C2 LP2C3 LP2C4 LP2C5 LP2C6 LP2C7 LP3C1 LP3C2 LP3C3 LP3C4 LP3C5 HSYNC LP3C6 VSYNC LP3C7 ENABLE LP4C1 LP4C2 LP4C3 LP4C4 LP4C5 LP4C6 LP4C7 Reserved © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 2-11...

  • Page 34: Lvds Spread Spectrum

    LVDS signals. The amount of spread (center spread of up to +/-2.5% and down spread of up to 5%) and the modulation frequency (in the range of 20-50kHz) are programmable through the LVDS registers. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc.

  • Page 35: Dvi/Hdmi

    See Table 2-10 below for details. The signal mapping for the transmission is shown in Table 2-9 (single link) and Table 2-10 (dual-link DVI) below. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 2-13...

  • Page 36: Table 2-9 Single Link Signal Mapping For Dvi/Hdmi

    Phase 2 Phase 3 Phase 4 Phase 5 Phase 6 Phase 7 Phase 8 Phase 9 Phase 10 Note: H/VSYNC are transmitted on TX0M/P (Blue) channel during blank. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 2-14 Proprietary...

  • Page 37: Table 2-10 Dual-Link Signal Mapping For Dvi

    - H/VSYNC are transmitted on TX0M/P (Blue) channel during blank. - For DVI dual-link mode, the first active data pixel is defined as pixel#0 (an even pixel), as opposed to the DVI specifications. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 2-15...

  • Page 38: Support For Hdmi™ Packet Types

    MPEG Source InfoFrames should not be used. * Note: These packet types are supported using generic packet types. A maximum of two of them can be supported simultaneously. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 2-16...

  • Page 39: Vga Dac Characteristics

    7 - Measured from the end of the overshoot to the point where the amplitude of the video ringing is down to +/-5% of the final steady state value. 8 - This parameter is sampled, not 100% tested. 9 - Monotonicity is guaranteed. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 2-17...

  • Page 40: Dvi-I Support

    VGA Signals Figure 2-9 Pins for Analog Output on the DVI-I Connector For the DVI output portion of the DVI-I connector, AMD recommends using the RS780E’s LVTM interface to provide the DVI output and routing these digital signals (see section 2.3, “LVTM (LVDS/TMDS) Interface‚’ on page 2-6 ) to the appropriate inputs on the DVI-I connector.
  • Page 41 “DisplayPort™ Interface” on page 3-10 “Power Management Pins” on page 3-11 “Miscellaneous Pins” on page 3-12 “Power Pins” on page 3-12 “Ground Pins” on page 3-13 “Strapping Options” on page 3-14 © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 42: Pin Assignment Top View

    Side-port Memory Interface CRT Interface External graphics Interface LVDS Interface General Purpose External Device Interface Power Management Interface Powers Grounds Others Figure 3-1 RS780E Pin Assignment Top View (Left) 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 43: Figure 3-2 Rs780E Pin Assignment Top View (Right)

    Side-port Memory Interface CRT Interface External graphics Interface LVDS Interface General Purpose External Device Interface Power Management Interface Powers Grounds Others Figure 3-2 RS780E Pin Assignment Top View (Right) © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 44: Interface Block Diagram

    AVSSQ PLLVDD18 AVSSDI VDDA18HTPLL RED#, GREEN#, BLUE# VDDHTTX VDD18 VSSLT Grounds VDD33 VSSLTP18 VDDHTRX IOPLLVSS VDDHT PLLVSS VDDA18PCIEPLL VSSAPCIE VDDA18PCIE VSSAHT VDDC Figure 3-3 RS780E Interface Block Diagram 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 45: Cpu Hypertransport™ Interface

    (refer to the reference schematics for the proper resistor values). Reference voltage. It supplies the threshold value for MEM_VREF Other – None distinguishing between “1” and “0” on a memory signal. Typical value is 0.5*VDD_MEM. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 46: Pci Express® Interfaces

    VSSAPCIE external resistor of an appropriate value. TX Impedance Calibration. Connect to GND on the motherboard with an external PCE_CALRP Other VDDPCIE VSSAPCIE resistor of an appropriate value. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 47: Clock Interface

    C™ data for display (to video monitor). The signal is 5V-tolerant. PU/PD/none 50k DAC_SCL VDD33 programmable: C clock for display (to video monitor). The signal is 5V-tolerant. PU/PD/none © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 48: Lvtm Interface

    LVDS mode. LVDS lower clock channel (+). This channel is used as the TXCLK_LP VDDLT18 LVSSR None transmitting channel in single channel LVDS mode. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 49: Lvtm Interface In Tmds Mode

    DVI dual-link mode and is not used for HDMI support. TMDS data channel 4 (+) The channel is only used TXOUT_U0P TX4P VDDLT18 VSSLT None in DVI dual-link mode and is not used for HDMI support. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 50: Tmds Interface Multiplexed On The Pci Express® Graphics Lanes

    DisplayPort outputs. For more explanations, please refer to RS780 DisplayPort Implementation Details (AN_RS780A5). 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 3-10...

  • Page 51: Power Management Pins

    Signal High means all power planes are valid. It is not observed internally until it has been high for more than six consecutive REFCLK cycles. The rising edge of this signal is deglitched. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 3-11...

  • Page 52: Miscellaneous Pins

    These balls are only for maintaining pin-compatibility with the VDDLT33 Other – – – RS740-series IGPs AMD chipsets. They can either be connected to a 3.3V rail or left unconnected on RS780E systems. 3.13 Power Pins Table 3-15 Power Pins Pin Name...

  • Page 53: Ground Pins

    Ground for system PLLs PLLVSS Ground pin for graphics core PLL RED#, GREEN#, G17, F18, F19 Grounds for the DAC. These pins must be connected directly to BLUE# ground. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 3-13...

  • Page 54: Strapping Options

    C™ serial EEPROM (for debug purpose only; contact your AMD CSS representative for details). • Setting through an external debug port, if implemented (contact your AMD CSS representative for details). All of the straps listed in Table 3-17 are defined active low. To select “1”, the strap pins must be pulled up to VDD33 through resistors.

  • Page 55: Table 3-17 Strap Definitions For The Rs780E

    Reference Guide, order# 43451, and the RS780 ASIC Family Register Programming Requirements, order# 43291, for details.SR5580 Register Reference Guide [forthcoming] and the SR5580 Register Programming Requirements [forthcoming] for details. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary 3-15...
  • Page 56 Strapping Options This page intentionally left blank. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 3-16 Proprietary...

  • Page 57: Chapter 4: Timing Specifications

    Duty Cycle Notes: More details are available in AMD HyperTransport 3.0 Reference Clock Specification and AMD Family 10h Processor Reference Clock Parameters, order # 34864. 1 Single-ended measurement at crossing point. Value is maximum-minimum over all time. DC value of common mode is not important due to blocking cap.

  • Page 58: Pci Express® Differential Clock Ac Specifications

    MCA_DLL_ADJ_DQSR_1 = 36, then DQS1 is delayed by 0.25 x memory_clock_period. So, if the memory clock period is 5ns, then DQS1 is delayed internally by 1.25ns with respect to DQ[15:8]. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc.

  • Page 59: Write Cycle Dq/Dqs Delay

    Depending on the board layout of DQS and DQ signals, it may be necessary to have different delays for each DQS signal. Layouts of the DQS and DQ signals should follow the rules given in the AMD RS740/RS780-Series IGP Motherboard Design Guide, order# 42336 .

  • Page 60: Power Rail Power-Up Sequence

    I/O Transform rails 1.8V Display, PLL, and I/O Transform rails ramp No restrictions high relative to 1.1V PLL rails 1.1V PLL rails ramp high relative to VDDC (1.1V) No restrictions 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 61: Lcd Panel Power Up/Down Timing

    *Note: Values for M, N1 and N2 are programmable through the following registers: M = LVTMA_PWRSEQ_REF_DIV.LVTMA_PWRSEQ_REF_DIV (1- 255) N1 = LVTMA_PWRSEQ_DELAY1.LVTMA_PWRUP_DELAY1 (0 - 15) N2 = LVTMA_PWRSEQ_DELAY1.LVTMA_PWRUP_DELAY2 (0 - 15) © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 62 LCD Panel Power Up/Down Timing This page is left blank intentionally. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 63: Electrical Characteristics

    1.89 Power for LVTM PLL macro VDDPCIE 1.045 1.155 Main I/O power for PCI-E graphics, SB, and GPP interfaces Note: Numbers in this table are to be qualified. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 64: Dc Characteristics

    DDC_DATA1/AUX1N Vdiff Pad differential output swing DDC_CLK1/AUX1P Note: The AUX signals comply with VESA’s DisplayPort™ Standard. Please refer to the document for other electrical characteristics of the signals. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 65: Table 5-5 Dc Characteristics For Powergood

    DC Input Reference Voltage 0.882V 0.918V Input Leakage Current 10A 15A Tri-state Leakage Current 10A 15A Output Low Current 19mA 28mA Output High Current -19mA -29.5mA Input Capacitance © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 66: Table 5-9 Dc Characteristics For The Memory Interface When Supporting Ddr3

    2 Measured under typical conditions, at minimum differential clock frequency and maximum DVI/HDMI™ PLL VOC frequency. 3 Measured under typical conditions, based on typical leakage values. 4 Figure 5-1 below illustrates some of the DC Characteristics of the DVI/HDMI interface. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 67: Figure 5-1 Dc Characteristics Of The Tmds Interfaces

    2 Figure 5-1 below illustrates some of the DC Characteristics of the TMDS interface. Single-ended Waveforms VHmax VHmin VLmax VLmin Differential Waveform 2VSW Figure 5-1 DC Characteristics of the TMDS Interfaces © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 68: Figure 5-2 Dc Characteristics Of The Lvds Interface

    4 Figure 5-2 below illustrates the DC Characteristics of the LVDS interface. Single-ended Waveforms VCM = 1.125- 1.375V Ground Differential Waveform +257 to +454mV -257 to -454mV Figure 5-2 DC Characteristics of the LVDS Interface 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 69: Rs780E Thermal Characteristics

    AMD’s reference heat sink solution for the RS780E. Refer to Chapter 6 in the Thermal Design and Analysis Guidelines for the RS780 Product Family, order# 44638, for heatsink and thermal design guidelines.

  • Page 70: Thermal Diode Characteristics

    Measured values of diode ideality factor and series resistance for the diode circuit are defined in the Thermal Design and Analysis Guidelines or the RS780 Product Family, order# 44638. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 71: Package Information

    0.60 20.85 21.00 21.15 8.58 2.00 1.00 20.85 21.00 21.15 7.70 2.00 1.00 19.20 19.20 0.80 (min. pitch) 0.20 Note: Maximum height of SMT components is 0.650 mm. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 72: Pressure Specification

    ASIC package will not exceed 600 micron strain under any circumstances. • Ensure that any distortion (bow or twist) of the board after SMT and cooling device assembly is within industry 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 5-10...

  • Page 73: Board Solder Reflow Process Recommendations

    (or eight) pads at each corner of the ASIC package, the size of the openings should not exceed 400µm (see Figure 5-3 below). This recommendation is based on AMD’s sample land pattern design for the RS780E, which is available from your AMD CSS representative.

  • Page 74: Figure 5-4 Rohs/Lead-Free Solder (Sac305/405 Tin-Silver-Copper) Reflow Profile

    60 – 80 sec typical 60 – 80 sec typical Pre–heating Zone 120 - 240 sec max Heating Time Heating Time Figure 5-4 RoHS/Lead-Free Solder (SAC305/405 Tin-Silver-Copper) Reflow Profile 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. 5-12 Proprietary...

  • Page 75: Chapter 6: Power Management And Acpi

    Output to the Southbridge to allow LDTSTOP# assertion. Northbridge LDTSTOP# HyperTransport™ Technology Stop: Enables and disables links during Southbridge system state transitions. POWERON# Power On Power switch RESET# Global Reset Southbridge © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 76: Power Management For The Graphics Controller

    Specifically, if bit 4 is set, the CAP_PTR register is implemented to give offset to the first item in the Capabilities link list. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 77: Register Block Definition

    Read accesses to the reserved or the unimplemented registers must be completed normally and a data value of 0000h should be returned. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 78: Capability Identifier: Cap_Id (Offset = 0)

    The definition of these registers (including layout, size, and bit definitions) is specific to each capability. The PCI Power Management Register Block is defined in Figure 6-1, ‘Linked List for Capabilities,” below. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 79: Next Item Pointer (Offset = 1)

    For Power Management of the RS780E, this pointer is set to 80h and it points to the next capability pointer of the MSI structure. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 80: Pmc - Power Management Capabilities (Offset = 2)

    Read Only Reserved Read Only Reserved 02:00 001b Read Only A value of 001b indicates that this function complies with Revision 1.0 of the PCI Power Management Interface Specification. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 81: Chapter 7: Testability

    TDO: Test Mode Data Out (IEEE 1149.1 data out) POWERGOOD I/O Reset XOR Test 7.3.1 Description of a Generic XOR Tree Figure 7-1 An example of a generic XOR tree is shown in the © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 82: Description Of The Rs780E Xor Tree

    When differential signal pairs are listed as single entries on the XOR tree, opposite input values should be applied to the two signals in each pair (e.g., for entry no. 1 on the tree, when “1” is applied to HT_RXCAD0P, “0” should be applied to HT_RXCAD0N). 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 83: Table 7-3 Rs780E Xor Tree

    AB12 GFX_RX1P/N A3/B3 MEM_A1 AE16 GFX_RX2P/N C2/C1 MEM_A2 GFX_RX3P/N E5/F5 MEM_A3 AE15 GFX_RX4P/N G5/G6 MEM_A4 AA12 GFX_RX5P/N H5/H6 MEM_A5 AB16 GFX_RX6P/N J6/J5 MEM_A6 AB14 GFX_RX7P/N J7/J8 MEM_A7 AD14 © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 84: Voh/Vol Test

    The VOH/VOL logic gives signal output on I/O’s when test patterns are applied through the TEST_ODD and Figure 7-2 TEST_EVEN inputs. Sample of a generic VOH/VOL tree is shown in 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 85: Voh/Vol Tree Activation

    4. Set DAC_SDA to 0. 5. Load JTAG instruction register with the instruction 0110 0011. 6. Load JTAG instruction register with the instruction 0010 0111. 7. Set POWERGOOD to 1. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 86: Voh/Vol Pin List

    (see last paragraph for explanations), and the output of the negative pin (“N”) will be of the opposite value. For example, for entry no. 1 on the tree, when TEST_EVEN is 1, HT_TXCAD0P will give a value of 1 and HT_TXCAD0N will give a value of 0. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 87: Table 7-5 Rs780E Voh/Vol Tree

    C3/B2 Even MEM_DQ11 AC18 GFX_TX3P/N D1/D2 MEM_DQ12 AB20 Even GFX_TX4P/N E2/E1 Even MEM_DQ13 AD22 GFX_TX5P/N F4/F3 MEM_DQ14 AC22 Even GFX_TX6P/N F1/F2 Even MEM_DQ15 AD21 GFX_TX7P/N H4/H3 MEM_DM0 Even © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 88 GPP_TX2P/N AA2/AA1 Even GPP_TX3P/N Y1/Y2 GPP_TX4P/N Y4/Y3 Even GPP_TX5P/N V1/V2 SB_TX0P/N AD7/AE7 Even SB_TX1P/N AE6/AD6 SB_TX2P/N AB6/AC6 Even SB_TX3P/N AD5/AE5 LVDS_BLON Even LVDS_ENA_BL LVDS_DIGON Even DAC_VSYNC DAC_HSYNC Even 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 89: Appendix A Pin Listings

    This appendix contains pin listings for the RS780E sorted in different ways. To go to the listing of interest, use the linked cross-references below: “RS780E Pin List Sorted by Ball Reference” on page A-2 “RS780E Pin List Sorted by Pin Name” on page A-7 © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...

  • Page 90: Rs780E Pin List Sorted By Ball Reference

    HT_RXCLK1N AC23 VDDHTTX AE19 MEM_DM1 AA24 HT_RXCAD10P AC24 HT_RXCAD8P GPP_RX1P AA25 HT_RXCAD10N AC25 HT_RXCAD8N AE20 VSSAPCIE VSSAPCIE AE21 MEM_DQS1N SB_RX2P VSSAPCIE AE22 MEM_DQ10 SB_RX2N SB_TX2N AE23 IOPLLVDD18 SB_RX1P 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...
  • Page 91 AVSSDI GFX_RX2N RED# LDTSTOP# ALLOW_LDTSTOP RESERVED VDDHTRX VSSLT GREEN VSSAPCIE VSSLT BLUE HT_TXCAD9P VSSLT GFX_TX4P HT_TXCAD8N GFX_RX2P VSSLT VSSAHT VSSLT VDDHTRX VSSAHT VSSLT VSSAHT VSSAHT HT_RXCALP HT_TXCAD1P VSSAPCIE © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 92 VDDHT VSSAHT VDDA18PCIE HT_TXCAD11P VSSAHT VDDC HT_TXCAD12N VSSAHT GFX_TX9P VSSAPCIE VDDC HT_TXCAD10P GFX_RX8P VDDC HT_TXCAD10N GFX_RX8N VSSAHT VSSAPCIE VDDHT HT_TXCAD5N GFX_RX9N VDDHTTX HT_TXCAD5P VDDPCIE HT_TXCAD15P VSSAPCIE GFX_TX13P HT_TXCTL1P 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...
  • Page 93 GFX_RX12P MEM_CKP VDDPCIE MEM_DQ4 MEM_DQ3 GFX_REFCLKN VDDHTTX GPP_TX3N VDDA18PCIE VSSAHT VDDHTTX VDDC GPP_TX5N VSSAHT HT_RXCAD13N HT_RXCAD11P VDDC HT_RXCAD13P HT_RXCAD11N VDDC HT_RXCAD1P HT_RXCAD0N VDDHT HT_RXCAD1N HT_RXCAD0P VDDHTTX HT_RXCAD2N GPP_TX4N © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 94 Pin Listings Ball Ref Pin Name GPP_TX4P SB_RX3N VSSAPCIE SB_RX1N SB_RX0N VDDA18PCIE 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

  • Page 95: Rs780E Pin List Sorted By Pin Name

    GFX_TX4P HT_REFCLKN GFX_RX15N GFX_TX5N HT_REFCLKP GFX_RX15P GFX_TX5P HT_RXCAD0N GFX_RX1N GFX_TX6N HT_RXCAD0P GFX_RX1P GFX_TX6P HT_RXCAD10N AA25 GFX_RX2N GFX_TX7N HT_RXCAD10P AA24 GFX_RX2P GFX_TX7P HT_RXCAD11N GFX_RX3N GFX_TX8N HT_RXCAD11P GFX_RX3P GFX_TX8P HT_RXCAD12N © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 96 HT_TXCAD10N IOPLLVSS AD23 MEM_DQ7 HT_TXCAD10P LDTSTOP# MEM_DQ8 AC20 HT_TXCAD11N LVDS_BLON MEM_DQ9 AD19 HT_TXCAD11P LVDS_DIGON MEM_DQS0N HT_TXCAD12N LVDS_ENA_BL MEM_DQS0P HT_TXCAD12P MEM_A0 AB12 MEM_DQS1N AE21 HT_TXCAD13N MEM_A1 AE16 MEM_DQS1P AD20 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...
  • Page 97 VDDA18PCIE VDDHTRX TESTMODE VDDA18PCIE VDDHTRX THERMALDIODE_N VDDA18PCIE VDDHTRX THERMALDIODE_P VDDA18PCIE VDDHTTX AA21 TMDS_HPD VDDA18PCIE VDDHTTX AB22 TXCLK_LN VDDA18PCIE VDDHTTX AC23 TXCLK_LP VDDA18PCIE VDDHTTX AD24 TXCLK_UN VDDA18PCIE VDDHTTX AE25 © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 98 VSSAHT VSSAPCIE AB19 VSSAHT VSSAPCIE AB21 VSSAHT VSSAPCIE AC12 VSSAHT VSSAPCIE AE14 VSSAHT VSSAPCIE AE20 VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSLT 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. A-10 Proprietary...
  • Page 99 Pin Listings Pin Name Ball Ref VSSLT VSSLT VSSLT VSSLT VSSLT VSSLT VSSLTP18 © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary A-11...
  • Page 100 Pin Listings This page is left blank intentionally. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. A-12 Proprietary...

  • Page 101: Appendix B Revision History

    • Updated Section 1.4, “Branding Diagram”: Corrected part number in the branding. Rev. 3.10 (Aug 2009) • Updated book title and cover page with the device’s marketing name. © 2009 Advanced Micro Devices, Inc. 45732 AMD 780E Databook 3.10 Proprietary...
  • Page 102 Revision History This page intentionally left blank. 45732 AMD 780E Databook 3.10 © 2009 Advanced Micro Devices, Inc. Proprietary...

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