Lvds Port (Cn8) - Aaeon GENE-BT07 User Manual

2.5.3 LVDS Port (CN8)

* LVDS LCD_PWR can be set to 3.3V or +5V by JP1
* LVDS VDD power can be set by JP4
Pin Pin Name
1 BKL_ENABLE
2 BKL_CONTROL
3 LCD_PWR
4 GND
5 LVDS_A_CLK-
6 LVDS_A_CLK+
7 LCD_PWR
8 GND
9 LVDS_DA0-
10 LVDS_DA0+
11 LVDS_DA1-
12 LVDS_DA1+
13 LVDS_DA2-
14 LVDS_DA2+
15 LVDS_DA3-
Chapter 2 – Hardware Information
PIN 29
PIN 1
Signal Type
OUT
OUT
PWR
GND
DIFF
DIFF
PWR
GND
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
PIN 30
PIN 2
Signal Level
+3.3V/+5V
+3.3V/+5V
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