AMD Athlon Processor x86 Optimization Manual page 219

22007E/0—November 1999
Table 19. Integer Instructions (Continued)
Instruction Mnemonic
SBB mreg16/32, reg16/32
SBB mem16/32, reg16/32
SBB reg8, mreg8
SBB reg8, mem8
SBB reg16/32, mreg16/32
SBB reg16/32, mem16/32
SBB AL, imm8
SBB EAX, imm16/32
SBB mreg8, imm8
SBB mem8, imm8
SBB mreg16/32, imm16/32
SBB mem16/32, imm16/32
SBB mreg16/32, imm8 (sign extended)
SBB mem16/32, imm8 (sign extended)
SCASB AL, mem8
SCASW AX, mem16
SCASD EAX, mem32
SETO mreg8
SETO mem8
SETNO mreg8
SETNO mem8
SETB/SETC/SETNAE mreg8
SETB/SETC/SETNAE mem8
SETAE/SETNB/SETNC mreg8
SETAE/SETNB/SETNC mem8
SETE/SETZ mreg8
SETE/SETZ mem8
SETNE/SETNZ mreg8
SETNE/SETNZ mem8
SETBE/SETNA mreg8
SETBE/SETNA mem8
SETA/SETNBE mreg8
SETA/SETNBE mem8
Instruction Dispatch and Execution Resources
AMD Athlon™ Processor x86 Code Optimization
First Second ModR/M
Byte Byte Byte
19h 11-xxx-xxx
19h mm-xxx-xxx DirectPath
1Ah 11-xxx-xxx
1Ah mm-xxx-xxx DirectPath
1Bh 11-xxx-xxx
1Bh mm-xxx-xxx DirectPath
1Ch
1Dh
80h 11-011-xxx
80h mm-011-xxx DirectPath
81h 11-011-xxx
81h mm-011-xxx DirectPath
83h 11-011-xxx
83h mm-011-xxx DirectPath
AEh
AFh
AFh
0Fh 90h 11-xxx-xxx
0Fh 90h mm-xxx-xxx DirectPath
0Fh 91h 11-xxx-xxx
0Fh 91h mm-xxx-xxx DirectPath
0Fh 92h 11-xxx-xxx
0Fh 92h mm-xxx-xxx DirectPath
0Fh 93h 11-xxx-xxx
0Fh 93h mm-xxx-xxx DirectPath
0Fh 94h 11-xxx-xxx
0Fh 94h mm-xxx-xxx DirectPath
0Fh 95h 11-xxx-xxx
0Fh 95h mm-xxx-xxx DirectPath
0Fh 96h 11-xxx-xxx
0Fh 96h mm-xxx-xxx DirectPath
0Fh 97h 11-xxx-xxx
0Fh 97h mm-xxx-xxx DirectPath
Decode
Type
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
VectorPath
VectorPath
VectorPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
DirectPath
203