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AMD Athlon™ Processor x86 Code Optimization
Write-Combining Definitions and Abbreviations
What is Write Combining?
Programming Details
156
This appendix uses the following definitions and abbreviations:
UC—Uncacheable memory type
WC—Write-combining memory type
WT—Writethrough memory type
WP—Write-protected memory type
WB—Writeback memory type
One Byte—8 bits
One Word—16 bits
Longword—32 bits (same as a x86 doubleword)
Quadword—64 bits or 2 longwords
Octaword—128 bits or 2 quadwords
Cache Block—64 bytes or 4 octawords or 8 quadwords
Write combining is the merging of multiple memory write
cycles that target locations within the address range of a write
buffer. The AMD Athlon processor combines multiple
memory-write cycles to a 64-byte buffer whenever the memory
address is within a WC or WT memory type region. The
processor continues to combine writes to this buffer without
writing the data to the system, as long as certain rules apply
(see Table 9 on page 158 for more information).
The steps required for programming write combining on the
AMD Athlon processor are as follows:
1. Verify the presence of an AMD Athlon processor by using
the CPUID instruction to check for the instruction family
code and vendor identification of the processor. Standard
function
0
on
identification string of "AuthenticAMD" in registers EBX,
EDX, and ECX. Standard function 1 returns the processor
AMD
processors
Write-Combining Definitions and Abbreviations
22007E/0—November 1999
returns
a
vendor
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