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BJ88.
An Unexpected Page Fault May Occur Following the Unmapping and
Re-mapping of a Page
Problem:
An unexpected page fault (#PF) may occur for a page under the following conditions:
•The paging structures initially specify a valid translation for the page.
•Software modifies the paging structures so that there is no valid translation for the
page (e.g., by clearing to 0 the present bit in one of the paging-structure entries used
to translate the page).
•Software later modifies the paging structures so that the translation is again a valid
translation for the page (e.g., by setting to 1 the bit that was cleared earlier).
•A subsequent instruction loads from a linear address on the page.
•Software did not invalidate TLB entries for the page between the first modification of
the paging structures and the load from the linear address.
In this case, the load by the later instruction may cause a page fault that indicates that
there is no translation for the page (e.g., with bit 0 clear in the page-fault error code,
indicating that the fault was caused by a not-present page).
Implication:
Software may see an unexpected page fault that indicates that there is no translation
for the page. Intel has not observed this erratum with any commercially available
software.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ89.
A PCIe* Device That Initially Transmits Minimal Posted Data Credits
May Cause a System Hang
Problem:
Under certain conditions, if a PCIe device that initially transmits posted data credits
less than Max_Payload_Size/16 + 4 (16B/4DW is unit of data flow control) and is the
target of a Peer-to-Peer write of Max_Payload_Size, the system may hang due to
Posted Data credit starvation.
Implication:
Under certain conditions, the processor may encounter a Posted Data credit starvation
scenario and hang.
Workaround:
A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ90.
Some Model Specific Branch Events May Overcount
Problem:
Under certain internal conditions the following model specific performance monitoring
branch events may overcount:
•BR_INST_RETIRED.NOT_TAKEN
•BR_INST_RETIRED.NEAR_TAKEN
•BR_MISP_RETIRED.NOT_TAKEN
•BR_MISP_RETIRED.TAKEN
Implication:
Due to this erratum the events may overcount.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
Specification Update
47
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