Intel BX80623G530 Specification page 10

2nd generation intel core processor family desktop, intel pentium processor family desktop, and intel celeron processor family desktop, specification update
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Errata (Sheet 1 of 5)
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10
Status
An Enabled Debug Breakpoint or Single Step Trap May Be Taken after MOV SS/
No Fix
POP SS Instruction if it is Followed by an Instruction That Signals a Floating Point
Exception
No Fix
APIC Error "Received Illegal Vector" May be Lost
An Uncorrectable Error Logged in IA32_CR_MC2_STATUS May also Result in a
No Fix
System Hang
No Fix
B0-B3 Bits in DR6 For Non-Enabled Breakpoints May be Incorrectly Set
Changing the Memory Type for an In-Use Page Translation May Lead to Memory-
No Fix
Ordering Violations
Code Segment Limit/Canonical Faults on RSM May be Serviced before Higher
No Fix
Priority Interrupts/Exceptions and May Push the Wrong Address Onto the Stack
Corruption of CS Segment Register During RSM While Transitioning From Real
No Fix
Mode to Protected Mode
Debug Exception Flags DR6.B0-B3 Flags May be Incorrect for Disabled
No Fix
Breakpoints
DR6.B0-B3 May Not Report All Breakpoints Matched When a MOV/POP SS is
No Fix
Followed by a Store or an MMX Instruction
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM Exits after a
No Fix
Translation Change
No Fix
Fault on ENTER Instruction May Result in Unexpected Values on Stack Frame
No Fix
Faulting MMX Instruction May Incorrectly Update x87 FPU Tag Word
No Fix
FREEZE_WHILE_SMM Does Not Prevent Event From Pending PEBS During SMM
General Protection Fault (#GP) for Instructions Greater than 15 Bytes May be
No Fix
Preempted
#GP on Segment Selector Descriptor that Straddles Canonical Boundary May Not
No Fix
Provide Correct Exception Error Code
No Fix
IO_SMI Indication in SMRAM State Save Area May be Set Incorrectly
IRET under Certain Conditions May Cause an Unexpected Alignment Check
No Fix
Exception
No Fix
LER MSRs May Be Unreliable
LBR, BTS, BTM May Report a Wrong Address when an Exception/Interrupt Occurs
No Fix
in 64-bit Mode
MCi_Status Overflow Bit May Be Incorrectly Set on a Single Instance of a DTLB
No Fix
Error
No Fix
MONITOR or CLFLUSH on the Local XAPIC's Address Space Results in Hang
No Fix
MOV To/From Debug Registers Causes Debug Exception
No Fix
PEBS Record not Updated when in Probe Mode
Performance Monitoring Event FP_MMX_TRANS_TO_MMX May Not Count Some
No Fix
Transitions
REP MOVS/STOS Executing with Fast Strings Enabled and Crossing Page
No Fix
Boundaries with Inconsistent Memory Types may use an Incorrect Data Size or
Lead to Memory-Ordering Violations
ERRATA
Specification Update

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