Intel BX80569Q9550 - Core 2 Quad 2.83 GHz Processor Datasheet page 161

Intel itanium processor quad-core 1.86-1.73 ghz with 24 mb l3 cache 9350, intel itanium processor quad-core 1.73-1.60 ghz with 20 mb l3 cache 9340, intel itanium processor quad-core 1.60-1.46 ghz with 20 mb l3 cache 9330, intel itanium processor quad-core
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Signal Definitions
Table 7-1.
Signal Definitions for the Intel
Itanium
Name
FBD1NBICLK[C/D][P/N]0
FBD0SBOCLK[A/B][P/N]0
FBD1SBOCLK[C/D][P/N]0
FBD[0/1]REFSYSCLK[P/N]
FBD0NBI[A/B][P/N][12:0]
FBD0NBI[A/B][P/N][13]
®
®
Intel
Itanium
Processor 9300 Series and 9500 Series Datasheet
®
9500 Series (Sheet 3 of 8)
Type
I
These differential pair clock signals generated from the branch one, channel C and
D of FB-DIMMs are input to the processor.
FB-
DIMM
Interface
Name
Example: FBD1NBICLKDP0 represent FB-DIMM branch 1, northbound clock input
signal of channel D and positive bit of the differential pair.
O
These differential pair output clock signals generated from the processor are inputs
to the branch zero, channel A and B of FB-DIMMs.
FB-
DIMM
Interface
Name
Example: FBD0SBICLKAP0 represent FB-DIMM branch 0, southbound clock output
signal of channel A and positive bit of the differential pair.
O
These differential pair output clock signals generated from the processor are inputs
to the branch one, channel C and D of FB-DIMMs.
FB-
DIMM
Interface
Name
Example: FBD1SBICLKDP0 represents FB-DIMM branch 1, southbound clock output
signal of channel D and positive bit of the differential pair.
I
These signals are no longer used by the Intel
®
Intel
Itanium
I
These differential pair data signals generated from the branch zero, channel A and
B of FB-DIMMs are input to the processor.
FB-
DIMM
Interface
Name
Example: FBD0NBIAP[0] represent FB-DIMM branch 0, northbound data input lane
0 signal of channel A and positive bit of the differential pair.
I
These signals are spare lanes, and are intended for Reliability, Availability, and
Serviceability (RAS) coverage on the Intel
signals are not used by Intel
®
Itanium
®
Processor 9300 Series and Intel
Description
1
NB
I
Branch
North
Input
Number
Bound
0
SB
O
Branch
South
Output
Number
Bound
1
SB
O
Branch
South
Output
Number
Bound
®
9500 Series.
0
NB
I
Branch
North
Input
Number
Bound
®
Itanium
®
®
Itanium
9300 Processor Series.
CLK
C/D
P/N
Clock
Channel
Differential
Pair
Polarity
Positive/
Negative
CLK
A/B
P/N
Clock
Channel
Differential
Pair
Polarity
Positive/
Negative
CLK
C/D
P/N
Clock
Channel
Differential
Pair
Polarity
Positive/
Negative
®
®
Itanium
Processor 9300 Series and
A/B
P/N
[12:0]
Channel
Differential
Lane
Pair
Number
Polarity
Positive/
Negative
®
9500 Processor Series. These
®
161

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