Intel BV80605001914AG - Processor - 1 x Xeon X3430 Specification page 53

take longer to establish bit lock during the L0s exit sequence. In some cases bit lock
may not be achieved and may result in a system hang.
Implication: While exiting from L0s the PCIe bus may go into recovery mode. At the 5 GB/s rate
system hangs may occur while exiting from L0s; however the hangs have not been
seen on commercially available systems.
Workaround: A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
AAO117. FP Data Operand Pointer May Be Incorrectly Calculated After an FP
Access Which Wraps a 4-Gbyte Boundary in Code That Uses 32-Bit
Address Size in 64-bit Mode
Problem: The FP (Floating Point) Data Operand Pointer is the effective address of the operand
associated with the last non-control FP instruction executed by the processor. If an 80-
bit FP access (load or store) uses a 32-bit address size in 64-bit mode and the memory
access wraps a 4-Gbyte boundary and the FP environment is subsequently saved, the
value contained in the FP Data Operand Pointer may be incorrect.
Implication: Due to this erratum, the FP Data Operand Pointer may be incorrect. Wrapping an 80-bit
FP load around a 4-Gbyte boundary in this way is not a normal programming practice.
Intel has not observed this erratum with any commercially available software.
Workaround: If the FP Data Operand Pointer is used in a 64-bit operating system which may run code
accessing 32-bit addresses, care must be taken to ensure that no 80-bit FP accesses
are wrapped around a 4-Gbyte boundary.
Status: For the steppings affected, see the Summary Tables of Changes.
AAO118. IOTLB Invalidations Not Completing on Intel ® VT-d Engine for
Integrated High Definition Audio
Problem: IOTLB invalidation in the Intel® VT-d engine for integrated High Definition Audio device
may not complete and cause IVT field, bit [63] of IOTLBINV register (Offset 0x1208 in
Memory Mapped IO region described by VTBAR {device 8, function 0, offset 0x180}),
to not be cleared as expected. As a result, software may continue to poll this bit and
not detect successful invalidation completion.
Implication: When Intel VT-d engine for integrated High Definition Audio device is enabled and
software requests for IOTLB invalidation while audio traffic is active, the request may
not complete and may result in a software hang. Intel has not observed this erratum
with any commercially available software.
Workaround: A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
AAO119. IO_SMI Indication in SMRAM State Save Area May Be Lost
Problem: The IO_SMI bit (bit 0) in the IO state field at SMRAM offset 7FA4H is set to "1" by the
processor to indicate a System Management Interrupt (SMI) is either taken
immediately after a successful I/O instruction or is taken after a successful iteration of
a REP I/O instruction. Due to this erratum, the setting of the IO_SMI bit may be lost.
This may happen under a complex set of internal conditions with Intel® Hyper-
Threading Technology enabled and has not been observed with commercially available
software.
Implication: Due to this erratum, SMI handlers may not be able to identify the occurrence of I/O
SMIs.
Specification Update
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