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Place caps as close as practical to U22, two per side
C52
C53
C54
C58
C55
C56
C57
0.1U
0.01U
0.01U
0.1U
0.01U
0.01U
0.1U
7
PIC_SYNC3V
+3V
7
PIC_RED_IR3V
7
DIGICAL_PGM
R112
RP20
100
100K
7
DIGICAL_OUT_L
7
DIGICAL_IN3V
UNUSED INPUTS
TEST_MODE_L
T74
PIC_RX3V
PIC_RST
7
T X D 3 V
7
RXD3V
7
PIC_TX3V
T79
T78
T80
BAUD1
BAUD2
CHIP_SHIP
TMS
TDI
TDO
TCK
RP19
RP15
10K
100K
+3V
+3V
NRST
+3V
J3
1
TDI
JTAG TEST PORT
2
TMS
NOT POPULATED
3
TCK
4
DURING
TDO
5
PRODUCTION
6
NRST
7
NPB-40
U22
AT91R40807
+3V
10
V D D
A0/NLB
27
V D D
A 1
C59
28
V D D
A 2
44
V D D
A 3
0.1U
61
V D D
A 4
62
V D D
A 5
81
V D D
A 6
94
V D D
A 7
95
V D D
A 8
A 9
A10
49
P0/TCLK0
A11
50
P1/TIOA0
A12
51
P2/TIOB0
A13
A14
54
P3/TCLK1
A15
55
P4/TIOA1
A16
56
P5/TIOB1
A17
A18
57
P6/TCLK2
A19
58
P7/TIOA2
P28/A20/CS7
59
P8/TIOB2
P29/A21/CS6
P30/A22/CS5
P31/A23/CS4
60
P9/IRQ0
63
P10/IRQ1
64
P11/IRQ2
D0
66
P12/FIQ
D1
D2
D3
67
P13/SCK0
D4
68
P14/TXD0
D5
69
P15/RXD0
D6
D7
74
P20/SCK1
D8
75
P21/TDX1/NTRI
D9
76
P22/RXD1
D10
T81
D11
D12
70
P16
D13
71
P17
D14
72
P18
D15
73
P19
83
P23
NCS0
NCS1
88
TMS
P26/NCS2
89
TDI
P27/NCS3
90
TDO
91
TCK
NRD/NOE
NWR0/NWE
NWR1/NUB
2
GND
NWAIT
18
GND
P24/BMS
19
GND
36
GND
52
GND
NRST
53
GND
N W D O V F
65
GND
78
GND
86
GND
MCLKI
87
GND
P25/MCLKO
Notes:
Resistors are 1% 1/16W unless otherwise noted.
R Packs are 5% 1/32W unless otherwise noted.
RP1 100
4
5
1
3
6
3
2
7
4
1
8
RP2 100
5
6
4
5
7
3
6
8
2
7
9
1
8
11
RP3 100
12
4
5
13
3
6
14
2
7
15
1
8
16
RP4 100
17
4
5
20
3
6
21
2
7
22
1
8
RP5 100
23
24
4
5
25
3
6
26
2
7
29
1
8
RP6 100
30
4
5
3
6
31
2
7
32
1
8
RP7 100
33
34
4
5
35
3
6
37
2
7
38
1
8
RP8 100
39
40
4
5
41
3
6
42
2
7
43
1
8
45
46
4
5
47
3
6
48
2
7
1
8
RP10 100
RP9
100
97
NCS0
98
1
8
99
2
7
NWE
100
3
6
NOE
4
5
92
+3V
93
77
96
T8
84
NRST
79
80
R5
10
R27
82
85
10
T9
Y2
3
OUT
EN
2
GND
V C C
32.000MHZ
C61
0.01U
A 1
A 2
A 3
A 4
A 5
FLASH PROGRAM MEMORY
A 6
A 7
A 8
A 1
25
A 2
24
A 9
A 3
23
A10
A 4
22
A11
A 5
21
A12
A 6
20
A 7
19
A13
A 8
18
A14
A 9
8
A15
A10
7
A16
A11
6
A12
5
A17
A13
4
A18
A14
3
A19
A15
2
A20
A16
1
A[1:20]
A17
48
D0
A18
17
D1
A19
16
D2
A20
9
D3
NCS0
26
D4
NOE
28
D5
NWE
11
D6
NRST
12
D7
47
D8
37
D9
D10
D11
+3V
D12
D13
D14
D15
D[0:15]
U23
1
RST
V C C A
VCC3
2
GND
VCC5
LTC1728-5
T82
C70
1
0.1U
4
+3V
Technical Discussion
U24
D0
29
A 0
DQ0
31
D1
A 1
DQ1
33
D2
U24 IS HARDWARE
A 2
DQ2
D3
35
A 3
DQ3
COMPATABLE WITH 2MBIT
D4
38
A 4
DQ4
TO 16MBIT BOOT BLOCK
40
D5
A 5
DQ5
FLASH FROM AMD,
42
D6
A 6
DQ6
D7
ATMEL, INTEL, MICRON,
44
A 7
DQ7
D8
30
SHARP, AND STM
A 8
DQ8
D9
32
A 9
DQ9
D10
34
U24 must be 120nS or
A10
DQ10
D11
36
A11
DQ11
faster
D12
39
A12
DQ12
D13
41
A13
DQ13
43
D14
A14
DQ14
D15
45
A15
DQ15/A-1
A16
15
+3V
A17
RY/BY
A18
13
A19
NC/VPP
14
NC/WP
10
CE
NC
OE
W E
RESET
BYTE
46
GND
27
V C C
GND
29LV400B
C62
0.1U
+3V
+3V Reset Trip Point
2.780V +- 0.078V
R43
178K
+5
T76
R44
100K
+5V Reset Trip Point
R72
3
4.599V +- 0.120V
15.0K
T83
R73
5
30.9K
BAT54SWT1
4
1
+5DIG
3
D6
2
RST_L5V
1,7
Figure 30
SpO
PCB
2
Schematic Diagram
(Sheet 4 of 7)
89
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Troubleshooting
