Agilent Technologies E8257D PSG User Manual page 227

Psg signal generators
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The TLM word is 30-bits long, with an 8-bit preamble, 16 reserve bits (bits 9 to 24, all set to zero), and 6
parity bits (bits 25 to 30).
The HOW word is 30-bits long, with the first 17 bits used for an incrementing time-of-week (TOW), bits 23
and 24 used for parity computation, and bits 25 to 30 used for parity bits.
During a GPS signal transmission, a pulse signal is generated every 6 seconds at the
EVENT 1 rear panel connector. This pulse coincides with the beginning of each subframe starting with the
second subframe and is synchronized to the RF output to compensate for any internal signal delay.
Chip Clock Reference
The GPS reference clock (chip clock) is adjustable using the
10.23 Mcps (the GPS standard). You can use the internal chip clock or an external source to provide the
reference. To use an external reference, connect the external source to the DATA CLOCK input connector.
NOTE
If you use an external source to provide the chip clock reference, the frequency of the
external source must match the PSG's reference clock frequency. Press the
softkey then use the numeric keypad to enter the reference clock frequency.
The P and C/A code chip rates are determined by the reference clock frequency whether you are using the
internal or an external chip clock reference. The P code chip rate matches the reference clock frequency and
the C/A code chip rate is one-tenth of the reference clock frequency. Refer to
block diagram showing how the GPS signal is generated within the PSG.
Chapter 8
GPS Modulation (Option 409)
GPS Ref (f0)
softkey. The factory-set value is
Figure 8-3 on page 211
Real Time GPS
GPS Ref (f0)
for a
213

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