Packet Processor; Host Processor; Hardware Components; Gateway Chassis - Juniper BX7000 Hardware Manual

CHAPTER 1: BX7000 Multi-Access Gateway Overview

Packet Processor

Host Processor

Hardware Components

Gateway Chassis

4 Hardware Components

Figure 1: System Architecture of the BX7000 Multi-Access Gateway

Packets in
The packet processor consists of four packet processing engines that perform Layer 2 and Layer 3
packet switching. It can process packets at an aggregate rate of 120 megabits per second. The
network processor promotes quick movement of packets through the gateway.
The host processor handles all routing protocol processes as well as the software processes that
control the gateway interfaces, the chassis components, the system management, and user
access to the gateway. These routing and software processes run on top of a kernel that interacts
with the packet processor. The host processor handles all packets that concern routing protocols,
freeing the packet processor to handle only packets that transit through the system. It also
provides different levels of system configuration and management functions, including
command-line interface (CLI), SNMP, and a NETCONF interface.
This section provides the overview of the gateway's hardware components:
Gateway Chassis on page 4
Front Panel on page 5
LEDs on page 5
T1/E1 Ports on page 6
Ethernet Ports on page 8
Console Ports on page 11
USB Host Port on page 12
External Alarm Contacts on page 12
Power Supplies on page 12
The chassis of the gateway is a rigid sheet metal structure that houses all the other gateway
components (see Figure 2 on page 5). The chassis measures 2.6 in. (6.7 cm) high, 17.51 in.
(44.47 cm) wide, and 9.44 in. (23.97 cm) deep (from front to the rear of the chassis) and installs in
a standard 19-in. equipment rack or in a standard enclosed cabinet.
Host Processor
Fabric
Packet Processor
Packets out
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