Intel i960 Design Manual page 98

Intel® i960® RM/RN I/O Processor
®
Intel 80960RM/RN Processor PBGA Signal Ball Map
Table F-2
Table F-2. 540-Lead H-PBGA Pinout — Intel
Ball #
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
B1
B2
B3
B4
B5
98
details the ballout for the 80960RN processor.
Signal Ball #
V
SS
V
SS
V
SS
V
SS
V B10
SS
P_AD29 B11
P_GNT# B12
SCL B13
NMI# B14
XINT3# B15
I_RST# B16
TDI B17
RAD00 B18
RAD04 B19
RAD08 B20
N/C B21
V B22
CC
RAD12 B23
RAD16 B24
RWE# B25
LCDINIT# B26
DCLKOUT B27
DQ01 B28
DQ03 B29
DQ05 B30
DQ07 B31
DQ40 B32
DQ42
V
CC
V
SS
V
SS
V
SS
V
SS
V
CC
V
CC
V
CC
V C10
CC
® ®
i960 RN I/O Processor Processor (Sheet 1 of 5)
Signal
B6 V
CC
B7 P_RST#
B8 V
CC
B9 XINT0#
V
CC
TMS
V
CC
RAD01
V
CC
V
2
CCPLL
V
CC
V
CC
V
CC
RALE
V
CC
V
SS
*
V
CC
DQ33
V
CC
DQ37
V
CC
DQ09
V
CC
V
CC
V
CC
V
CC
V
SS
C1 V
SS
C2 V
CC
C3 V
CC
C4 V
SS
C5 V
CC
C6 P_AD30
C7 P_INTD#
C8 SDA
C9 XINT1#
XINT4#
Ball # Signal
C11 TRST#
C12 TCK
C13 RAD02
C14 RAD05
C15 RAD09
C16 V
CC
C17 V
SS
C18 RAD13
C19 RCE0#
C20 P_CLK
C21 ONCE#
C22 V
1
CCPLL
C23 DQ02
C24 DQ35
C25 DQ06
C26 DQ39
C27 DQ41
C28 DQ11
C29 V
CC
C30 V
CC
C31 V
CC
C32 V
SS
D1 V
SS
D2 V
CC
D3 V
SS
D4 V
SS
D5 V
SS
D6 P_AD31
D7 V
SS
D8 P_INTB#
D9 V
SS
D10 XINT5#
D11 V
SS
D12 V
CC
D13 V
SS
D14 RAD06
D15 V
SS
Design Guide