Ethernet Port1/2 Common Information; Open Completion Signal; Open Request Signal; Socket/Fixed Buffer Reception Status Signal - Mitsubishi Electric MELSEC iQ-RJ71EN71 User Manual

Ethernet
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Ethernet PORT1/2 common information

■Open completion signal (Un\G1900000 to Un\G1900007)
The open status of each connection is stored.
• 0: Closed or not open
• 1: Open completed
Address
b15
b14
Un\G1900000
16
15
Un\G1900007
128
127
The numbers in the table indicate connection numbers.
■Open request signal (Un\G1900008 to \G1900015)
The open processing status of each connection is stored.
• 0: No open request
• 1: Requesting open
Address
b15
b14
Un\G1900008
16
15
Un\G1900015
128
127
The numbers in the table indicate connection numbers.
■Socket/fixed buffer reception status signal (Un\G1900016 to Un\G1900023)
The reception status of each connection is stored.
• 0: Data not received
• 1: Data reception completed
Address
b15
b14
Un\G1900016
16
15
Un\G1900023
128
127
The numbers in the table indicate connection numbers.
■Initial status (Un\G1900024)
Address
Un\G1900024
■Initial error code (Un\G1900025)
Address
Un\G1900025
b13
b12
b11
b10
b9
14
13
12
11
10
126
125
124
123
122
b13
b12
b11
b10
b9
14
13
12
11
10
126
125
124
123
122
b13
b12
b11
b10
b9
14
13
12
11
10
126
125
124
123
122
Description
Stores the status of the initial processing of the RJ71EN71 or the RnENCPU (network part).
Initial normal completion status (b0)
0: 
1: Initialization normal completion
Initial abnormal completion status (b1)
0: 
1: Initialization abnormal completion
b2 to b15: Use prohibited
Description
Stores the information when the initial processing of the RJ71EN71 or the RnENCPU (network part) is completed
abnormally.
0: In initial processing or initial normal completion
Other than 0: Initial processing error code (An error code is stored.)
b8
b7
b6
b5
b4
9
8
7
6
5
121
120
119
118
117
b8
b7
b6
b5
b4
9
8
7
6
5
121
120
119
118
117
b8
b7
b6
b5
b4
9
8
7
6
5
121
120
119
118
117
b3
b2
b1
b0
4
3
2
1
116
115
114
113
b3
b2
b1
b0
4
3
2
1
116
115
114
113
b3
b2
b1
b0
4
3
2
1
116
115
114
113
APPX
Appendix 3 Buffer Memory
A
367

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