Explanation Of The Mnemonics Used In "Istack" - Siemens SIMATIC S5-100U System Manual

Diagnostics and Troubleshooting
5.2.4

Explanation of the Mnemonics Used in "ISTACK"

Table 5-5. Meaning of the Remaining ISTACK Bits
ISTACK
Byte
Display
BST SCH 1
SCH TAE
ADR BAU
STO ANZ 3
STO ZUS
BAT PUF
NEU STA
AF* 4
KOPFNI 5
KEIN AS** 6
URLAD
SYNFEH
ANZ 1/ANZ 0 12
OV
OR
STATUS
VKE
ERAB
FKT 13
*
relevant for CPU 103 only
**
for CPU 102: 0 = normal mode
1 = test mode
5-6
Shift block.
Execute shift operation.
Structure address list.
PLC in STOP
Internal control bit for STOP/RUN change
Battery backup available
PLC not yet in cycle after Power ON
- See bytes 9 and 10 for cause.
Interrupt enable/enabling of time-controlled OB13 and interrupt-
driven OB3
Program contains errors.
Block header cannot be interpreted.
Not enough S5 statement memory available
Overall reset, program defective
Program contains errors.
Condition code bits for arithmetic, logic, and shift operations.
Arithmetic overflow
ID bit of OR memory
Status ID of operand of last binary statement executed
Result of logic operation (RLO)
ID bit of first scan
0: O( OR parenthesis open
1: A( AND parenthesis open
Explanation
EWA 4NEB 812 6120-02b
S5-100U