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S5-100U
Response Time
Response time t
is defined as the time between a change in the input signal and the subsequent
R
change in the output signal.
Prerequisites for the following information:
•
No interrupts are running.
•
The programmer interface is not in use. (The load is very dependent on the function.)
The response time is influenced by the following factors:
•
The input module delay (see chapter 14)
•
The program processing time (see Appendix A)
•
The data cycle times (number of data bits x 25 µs - a bus configuration of 256 data bits results
in a data cycle time of approximately 8 ms)
•
The operating system run time (up to 3% of the program cycle)
•
The processing of the internal timers
Calculating the maximum response time t
•
With t
=
2 x program processing time + 3 x data cycle time + 3 x operating system run time
G
+ delay time of the input modules
•
Maximum processing time of the internal timers t
t
= number of processed timers x 32 µs
Tm
t
103 µs for CPU 103 version 8MA03
=
Tm
t
Tm
t
=
t
( 1 +
Rm
G
10 ms
During the transition from STOP to RUN, there is a one-time increase in the response time to about
200 ms.
1
I 0.0
0
1
Q 1.0
0
EWA 4NEB 812 6120-02b
T 0 to T15 for CPU 100
T 0 to T31 for CPU 102
T 0 to T127 for CPU 103
:
Rm
(
number of processed timers for CPU 100:
number of processed timers for CPU 102:
number of processed timers for CPU 103:
) + t
.
Tm
Response
Input
module
delay
Data
Program processing
cycle
A I 0.0 = Q 1.0
Figure 7-14. Calculating the Response Time
Tm
Data
cycle
Introduction to STEP 5
16
32
128)
Time
7-27
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