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Transmitter Holding Register
The transmitter holding register contains the character to be serially transmitted and is defined
below:
Transmitter Holding Register
Write Only DLAB
=
0
(Hex Address n230, n238, n240)
Bit
7
6
5
4
3
2
1
a
lSoatabita
Data bit 1
Data bit 2
...
Data bit 3
-
. .
Data bit 4
--
...
Data bit 5
-
--
Data bit 6
-
. ..
Data bit 7
-
Bit 0 is the least significant bit and is the first bit serially transmitted.
Programmable Baud-Rate Generator
The NS16450 contains a programmable baud-rate generator that can divide the clock input (1.8.432
MHz)
by any divisor from 1 to 655,535 or 216_1. The output frequency of the baud-rate generator
is the baud rate multiplied by 16. Two 8-bit latches store the divisor in a 16-bit binary format.
These divisor latches must be loaded during initialization to insure desired operation of the
baud-rate generator. Upon loading either of the divisor latches, a 16-bit baud counter is
immediately loaded. This prevents long counts on initial load. The contents of the divisor latches
are indicated below:
5080 Peripheral Adapter
29
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