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Horizontal Display Enable End Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 01. The processor output port
address for this register is hex 3B5 or hex 3D5.
Horizontal Display Enable End Register Format
Bit
7
6
5
4
3
2
1
0
&. . . 1 ---L.1---I.1---I1:""' - L.. 1
--L..I--,-I---,I_--t.~
Horizontal Display Enable End
This register defines the length of the horizontal display enable
signal. It determines the number of displayed character positions
per horizontal line.
Bit O-Bit 7
Horizontal display enable end -A value one less
than the total number of displayed characters.
Start Horizontal Blanking Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 02. The processor output port
address for this register is hex 3B5 or hex 3D5.
Start Horizontal Blanking Register Format
Bit
7
6
5
4
3
2
1
0
I
1 1 1 1
I I
I
.,
Start Vertical Blanking
This register determines when the horizontal blanking output
signal becomes active. The row scan address and underline scan
line decode outputs are multiplexed on the memory address
outputs and cursor outputs respectively during the blanking
interval. These outputs are latched external to the CRT
Controller with the falling edge of the BLANK output signal.
The row scan address and underline signals remain on the output
signals for one character count beyond the end of the blanking
signal.
26 IBM Enhanced Graphics Adapter
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