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Bit 7
latched properly, the retrace signal is started
before the end of the display enable signal, and
then skewed several character clock times to
provide the proper screen centering.
Start Odd/Even Memory Address-This bit
controls whether the first CRT memory address
output after a horizontal retrace begins with an
even or an odd address. A logical 0 selects even
addresses; a logical 1 selects odd addresses. This
bit is used for horizontal pel panning applications.
Generally, this bit should be set to a logical O.
Vertical Total Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 06. The processor output port
address for this register is hex 3B5 or 3D5.
Vertical Total Register Format
Bit
7
6
5
4
3
2
1
0
I I I I I I I I •
Vertical Total
Bit O-Bit 7
Vertical Total-This is the low-order eight bits of
a nine-bit register. The binary value represents
the number of horizontal raster scans on the CRT
screen, including vertical retrace. The value in
this register determines the period of the vertical
retrace signal. Bit 8 of this register is contained
in the CRT Controller Overflow Register hex 07
bit O.
CRT Controller Overflow Register
This is a write-only register pointed to when the value in the CRT
Controller Address Register is hex 07. The processor output port
address for this register is hex 3B5 or hex 3D5.
30 IBM Enhanced Graphics Adapter
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