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Bit O-Bit 7
Start Horizontal Retrace Pulse-The value
programmed is a binary count of the character
position number at which the signal becomes
active.
End Horizontal Retrace Register
This is a write-only register pointed to when the value in the CRT
Controller address register is hex 05. The processor output port
address for this register is hex 3B5 or hex 3D5.
End Horizontal Retrace Register Format
Bit
7
6
5
4
3
2
1
0
II
I
I I I
End Horizontal Retrace
Horizontal Retrace Delay
Start Odd Memory Address
This register specifies the character position at which the
Horizontal Retrace Pulse becomes inactive (logical 0).
Bit O-Bit 4
Bit 5-Bit 6
End Horizontal Retrace-A value equal to the
five least significant bits of the horizontal
character counter value at which time the
horizontal retrace signal becomes inactive (logical
0). To obtain a retrace signal of width W, the
following algorithm is used: Value of Start
Retrace Register
+
width of horizontal retrace
signal in character clock units
=
5-bit result to be
programmed into the End Horizontal Retrace
Register.
Horizontal Retrace Delay-These bits control
the skew of the horizontal retrace signal. Binary
00 equals no Horizontal Retrace Delay. For
some modes, it is necessary to provide a
horizontal retrace signal that takes up the entire
blanking interval. Some internal timings are
generated by the falling edge of the horizontal
retrace signal. To guarantee the signals are
IBM Enhanced Graphics Adapter 29
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