IBM RT Series Hardware Reference Manual page 322

TNL SN20-9844 (March 1987) to 75X0235
Word And Bit Addressability
There are 32 modes (16 horizontal modes and 16 vertical modes) of addressing data within the
bit map. One horizontal mode is on a conventional word (16 bit) boundary. The conventional
method accesses 16 bits beginning with bit 0 at the left to bit 15 on the right. The other 15
horizontal modes are arbitrarily bit aligned. Thus, the access overlaps into the next word as
required to reach a full 16 bit access. The addressing mode is determined by the contents of the
start bit displacement field in the mode register. These bits are set via an I/O write to the mode
register (see "Mode Register" on page 24). If this 4-bit field is equal to binary 0, then the access
is on the conventionally aligned even byte boundary. Any other binary value causes the
alignment to be otTset by that number of bits to the right within the the addressed word.
Note that with the start bit displacement field set to all zeros, that bit map access is equivalent
to conventional even word (16 bits) boundary addressing and the bit map appears to the system
as a conventional area of I/O channel memory.
Orthogonal Access
Masking
Besides the 16 horizontal addressing modes, the access direction may be specified horizontally or
vertically. The previous discussion on the addressing mode assumed horizontal access because
this is the conventional access direction in bit-mapped display adapters. Setting the mode
register horizontal access bit to otT directs the adapter to access the bit map in the vertical
orientation (down).
Since all memory accesses are I/O channel limited to 16 bit quantities, regardless of alignment,
masking is provided to allow for a variable number of bits to be written in either access
direction. The mode register contains a field called the write mask count, consisting of a 4-bit
binary value. If the mask count equals X'O', then 16 bits are written. If the mask count equals
X'I', then only one bit is written (the start X, Y bit). If the mask count equals X'2', then two
bits are written.
Logic Functions
During an I/O channel memory write operation, the incoming write data from the I/O data
channel is logically' ANDed', 'ORed' or 'XORed' with the bit map data. The logical function is
specified in the mode register. See "Mode Register" on page 24 for the logical functions
performed.
10 Extended Monochrome Graphics Adapter