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logical 1 's is sent or checked in the data word bits
and parity bit. When both bit 3 and bit 4 are a
logical 1, an even number of bits is sent or checked.
Bit 5
This bit is the stuck-parity bit. When bit 3 is a
logical 1 and bit 5 is a logical 1, the parity bit is sent
and then detected by the receiver as a logical 0, if
bit 4 is a logical 1, or as a logical 1 if bit 4 is a
10gical0.
Bit 6
This bit is the set-break control bit. When bit 6 is
set to a logical 1, the serial output (SQUT) is forced
to the spacing (logical 0) state and remains there
regardless of other transmitter activity. The
set-break is disabled by setting bit 6 to logical O.
This feature enables the microprocessor to select a
specific terminal in a computer communications
system.
Bit 7
This bit is the divisor-latch access bit (DLAB).
It
must be set high (logical 1) to gain access to the
divisor latches of the baud-rate generator during a
read or write operation.
It
must be set low (logical
0) to gain access to the receiver buffer, the
transmitter holding register, or the interrupt enable
register.
Modem Control Register (Hex XFC):
This 8-bit register
controls the data exchange with the modem or data set (an
external device acting as a modem).
Modem Control Reglater Ihex XFCI
Bit
7 6
5 4 3 2 1 0
~> D~'
' " m' " ,' "'''''
>
Request to Send
>
Out 1
>
Out 2
>
Loop
>
=0
>
=0
>
=0
Modem Control Register
12 Serial/Parallel Adapter
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