Graphic Operation Commands - IBM RT Series Hardware Reference Manual

TNL SN20-9844 (March 1987) to 75X0235
Graphic Operation Commands
Besides allowing direct bit manipulation of the video frame buffer by the system processor, the
Extended Monochrome Graphics Display Adapter can process commands which are received
from the system and stored in a command queue. These commands are loaded into the adapter
hidden bit map area as a linked-list structure. The graphic operation processor, which controls
the command list execution, recognizes three basic command word types:
• Load register command
• Branch command
• Execute command.
The load register command sets values into the various graphic operation processor registers.
Normally, commands are fetched and processed from sequential 16-bit memory addresses. The
branch command allows the list to be scattered throughout memory. Notice all command words
are aligned on 16-bit word boundaries.
The execute command identifies the graphic operation type and contains flag bits that control
and synchronize the queue operation.
Graphic Operation Command Queue
Commands for the graphic operations processor are loaded into a command queue by the
system and sequentially executed (subject to branching types of commands) by the adapter. The
command queue is represented by three elements:
• The actual memory locations used to hold the list of commands and referred as the queue
• The queue pointer which serves to hold the address within the queue of the next command
word to be processed
• The queue counter which provides the synchronization and interlocking between the graphic
operation processor and the system processor.
The queue consists of memory locations within the hidden bit map and is set up by the system
processor as a linked list of graphic operation commands via memory write cycles over the I/O
channel. The contents of any location within the queue may be accessed via a memory read
cycle.
The queue pointer appears as a memory location within the I/O channel memory map and may
be updated via a I/O channel memory write cycle.
The queue counter also appears as a memory location within the I/O channel memory map and
may be updated via a I/O channel memory write cycle.
30 Extended Monochrome Graphics Adapter