Condition Codes; Cnop Alignment - IBM System/370 Operator's Reference Manual

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CONDITION CODES
Condition Code Setting
0
1
Mask Bit Vlllue
8
4
o.r..llnstructi_
Add, Add Halfword
zero
<zero
>zero
.owrflow
Add Logical
zer~
not_o,
zero,
not zero,
no
carry
no carry
carry
carry
AND
_0
not_o
Compare, Compare Halfword equal
1st op low
1st op high
-
Compare and Swap/Double
equal
not equal
Compare Logical
equal
1st op low
1st op high
-
ExclusiwOR
zero
not zero
I nsert Characters under Mask all zero
htbitone
1st bit zero
-
Load and Test
<zero
>zero
Load Complement
<zero
>zero
overflow
Load
Negative
<zero
Load Positive
zero
>zero.
overflow
Move
Long
count equal count low·
count high
OII8rlap
OR
not zero
Shift Left DoublelSingie
zero
<zero
>zero
owrflow
Shift Right Double/Single
~ero
<zero
>zero
Store Clock
set
not set
error
not oper
Subtract, Subtract Halfword
<zero
>zero
overflow
Subtract Logical
not zero,
zero,
not zero,
no carry
carry
carry
Test and Set
Test uqder Mask
mixed
Translate and Test
incomplete
complete
Decl ..... Instructi_
Add Decimal
zero
<zero
>zsro
OIIerflow
Compare Decimal
equal
lst op low
ht op high
-
Edit, Edit and Mark
zero
<zero
>zeru
Shift and Round Decimal
zero
<zero
>zero
overflow
Subtract Decirnel
zero
<zero
>zero
CM:rflow
Zero and Add
zero
<zero
>zero
overflow
Floating-Point lnetructi_
Add Normalized
<zero
>zero
Add Unnormalized
zero
<zero
>zero
Comoere
equal
1st op low
ht op high
-
Load and Test
<zero
>zero
Load Complement
<zero
>zero
Load Negative
<zero
Load Positive
>zero
Subtract Normalized
<zero
>zero
Subtract Unnormalized
<zero
>zero
I nput/OutpUt I nltructio ..
Clear I/O
no
oper
in
CSWstored chan busy
not
oper
progress
Halt Device
interruption CSW stored channel
not
oper
pending
working
Halt I/O
interruption CSW stored burstop
not
oper
pending
stopped
Start 1/0, SIOF
successful
CSWstored busy
not oper
Store Channel
I
D
ID stored
CSW stored busy
not oper
Test Channel
lMIilable
interruption burst mode
not oper
pending
Test I/O
available
CSWstored busy
not oper
Syst ....
Control I
nstructi_
Load Real Address
lranslation
STenlry
PTentry
length
lMIilable
invalid
invalid
violation
Reset Reference Bit
R=O, C=OI
RzO,C=l
R=I, C=O
I
R=l, C=1
Set Clock
set
secure
notoper
Signal Processor
accepted
slat stored
busy
not oper
CNOP ALIGNMENT
DOUBLEWORD
WORD
WORD
HALFWORD
I
HALFWORD
HALFWORD
HALFWORD
BYTE. BYTE
BYTE
BYTE
BYTE , BYTE
BYTE ' BYTE
~
~
~
~
0,8
2,8
4,8
6,8
Page 2-4

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