Schematic Diagrams
TPM 1.2
Sheet 31 of 63
TPM 1.2
B - 32 TPM 1.2
VDD5
R795
C931
design value
--->
1.13K_1%_06
0.1u_16V_Y5V_04
depends on the
temperature
1
--->
NTC
2
J_RT1
85205-02701
TPM 1.2
R695
*10K_04
3.3VS
R692
0_04
R674
25
SUS_ST#
R1081
3.3VS
SUS_STAT#
5/18
R1082
VDD3
asserted before entering S3
LPC reset timing:
LPCPD# inactive to LRST# inactive 32~96us
HI
: ACCESS
TPM _PP
LOW : NORMAL
HI
: 4E/4F h
TPM _BADD
LOW : 2E/2F h
PCLK_TPM
R687
TPM_PP
R681
R685
TPM_BADD
R690
R686
R782
470K_04
R778
VDD5
100K_04
U47A
R797
LM358L
3
10K_04
+
1
2
-
D36
R777
C919
RB0540S2
100K_04
0.1u_16V_Y5V_04
G
R781
*10mil_NP_04
D35
*RB0540S2
H8_RST#
33
U34
26
10
25,33
LPC_AD0
23
LAD0
VDD1
19
25,33
LPC_AD1
LAD1
VDD2
20
24
25,33
LPC_AD2
LAD2
VDD3
17
25,33
LPC_AD3
LAD3
21
30
PCLK_TPM
LCLK
22
5
R675
25,33
LPC_FRAME#
LFRAME#
VSB
16
16,25,33,39,5
PLTRST#
27
LRESET#
24,33
LPC_SIRQ
SERIRQ
TPM_CLKRUN#
15
CLKRUN#
28
6
*0_04
TPM_PD#
LPCPD#
GPIO
2
10K_04
GPIO2
TPM_BADD
9
*10K_04
TESTBI/BADD
13
7
XTALI
TPM_PP
PP
14
XTALO
1
T
NC_1
3
4
T
NC_2
GND_1
12
11
T
NC_3
GND_2
18
8
GND_3
25
R680
*10mil_NP_04
TESTI
GND_4
( Internal PD )
SLB9635TT_3.17
*33_04
C833
*10p_50V_NPO_04
*10K_04
3.3VS
*10K_04
3.3V
10K_04
3.3VS
*10K_04
R796
Normal : 0
100K_04
Active : 1
Shutdown_stb_power
50
C922
R780
Q50
0.1u_16V_Y 5V_04
100K_04
MTN7002ZHS3
3.3VS
C842
C829
C844
C850
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y 5V_04
1u_6.3V_X5R_04
0_04
VDD3
C827
0.1u_16V_Y5V_04
T
T
C466
12p_50V_NPO_04
X4
32.768KHz-200
C478
12p_50V_NPO_04
D03-1012J
del X3(MC-146)
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