Sony HAP-S1 Service Manual page 97

FPGA DSP BOARD IC001 EP4CGX30BF14C8N (FPGA)
Pin No. Pin Name
A1 TDO
A2 TMS
A3 TDI
A4 DCLK
A5 IO/DATA0
A6 IO/CLKUSR
A7 IO/PLL2_CLKOUTN
A8 IO/PLL2_CLKOUTP
A9 CLK8/DIFFCLK_5N
A10 CLK9/DIFFCLK_5p
IO/DIFFCLK_T11N/
A11
DQ0T
IO/DIFFCLK_T11P/
A12
DQ0T
IO/DIFFIO_T17N/
A13 DQS0T/CQ0T/
DPCLK10
B1, B2 GND_B1, GND_B2
B3 TCK
B4 GND_B4
B5 IO/ASDO
IO/DQS1T/CQ0T#/
B6
DPCLK13
B7 GND_B7
IO/DIFFCLK_T12N/
B8
DQ0T
B9 GND_B9
B10 IO/VREFB7N0
B11 IO_B11
B12 GND_B12
IO/DIFFIO_T17P/
B13
DQ0T
C1 GXB_TX1n
C2 GXB_TX1p
C3 VCCIO9_C3
C4 nCE
C5 IO/NSCO
C6 IO/VREFB8N0
C7 VCCIO8_C7
IO/DIFFCLK_T12P/
C8
DQ0T
VCCIO7_C9,
C9, C10
VCCIO7_C10
C11 IO/PUP4/DQ0T
C12 IO/PDN4/DQ0T
IO/DiFFIO_T1BN/
C13
DQ0T
D1, D2 GND_D1, GND_D2
D3 VCCD_PLL_D3
D4 VCCA_D4
D5 nCONFIG
D6 GND_D6
D7 VCC_CLKIN8A
D8 GND_D8
D9 VCCA_D9
IO/DIFFIO_R4n/
D10
DEV_CLRn
D11 IO/DIFFIO_R2P
D12 IO/DIFFIO_R2N
IO/DIFFIO_T1BP/
D13
DQ0T
I/O
O Data output terminal for the JTAG
I Mode selection signal input terminal for the JTAG
I Data input terminal for the JTAG
I Serial data transfer clock signal input from the MPU
I Confi guration data input from the MPU
I Not used
O Not used
O Not used
I Audio data input from the audio DSP
I Not used
O Bit clock signal output to the audio DSP
O Not used
O Not used
- Ground terminal
I Clock signal input terminal for the JTAG
- Ground terminal
O Not used
O Not used
- Ground terminal
O Bit clock signal output to the audio DSP
- Ground terminal
O Audio data output to the audio DSP
O L/R sampling clock signal output to the audio DSP
- Ground terminal
O Not used
O Not used
O Not used
- Power supply terminal (+3.3V)
I Chip enable signal input terminal
O Not used
O Not used
- Power supply terminal (+3.3V)
O L/R sampling clock signal output to the audio DSP
- Power supply terminal (+3.3V)
O Not used
O Not used
O Not used
- Ground terminal
- Power supply terminal (+1.2V)
- Power supply terminal (+2.5V)
I Confi guration signal input from the MPU
- Ground terminal
- Power supply terminal (+2.5V)
- Ground terminal
- Power supply terminal (+2.5V)
I Reset signal input from the MPU
O Chip select signal output to the D/A converter
O Serial data output to the D/A converter
O Interrupt signal output to the MPU
Description
Not used
Not used
Not used
Not used
Not used
"L": reset
HAP-S1
97