Board Level Hardware Description
MEMC040 Memory Controller ASIC
2
MCECC Memory Controller ASIC
Functional Description
2-10
The MEMC040 memory controller ASIC provides the
programmable interface for the parity-protected DRAM mezzanine
board.
The MCECC memory controller ASIC provides the programmable
interface for the ECC-protected DRAM mezzanine board.
The major functional blocks of the MVME167 covered in this
section are:
Front panel switches and LED indicators
Data bus structure
MC68040 CPU
EPROM
SRAM
Onboard DRAM
Battery backed up RAM and clock
VMEbus interface
I/O interfaces
Local resources