Main Vco - Aeroflex NAV 2000R Operation Manual

Aeroflex Operation Manual
The MAIN PLL is used to generate frequencies from 225 MHz to 456.25 MHz. Controlling the MAIN
VCOs, the heart of this loop is the PLL IC U3. This PLL IC contains Reference input dividers, a dual
modules divide by 64/65 prescaler, dual modules divide by A and N counters, and a digital phase
comparator. The PLL IC is programmed by the microprocessor on the REF/CONTROL board. The
reference divider is set for divide by 214, producing an internal 50 kHz reference to the phase
comparator. With sequential programming of the A and N counters, this produces frequency steps of 50
kHz at the RF frequency. As noted earlier, the NAV 2000R synthesizer has step size of 10 Hz. To
produce this smaller frequency step, the 10.7 MHz reference input is shifted up or down in frequency to
produce the proper RF
frequency. As an example, consider the 10.7 MHz frequency shift required to shift 321 MHz plus 10 Hz.
321 MHz is 30 times 10.7 MHz. So to shift 321 MHz plus 10 Hz, 10.7 MHz must be shifted by 0.333 Hz or
10/30. The DDFS on the REF/CONTROL board can produce this shift to within less than one milliherz.
Transistor amplifiers Q1 and Q2 buffer the VCO output to isolate the PLL dividers from the VCO and
apply the VCO frequency to the PLL prescaler. The digital phase comparator generates five volt to
ground pulses, equal in width as the time due to phase difference between the 50 kHz reference and the
divided RF frequency. If the RF frequency is too low, pulses are on OV (pin 4 of U3). If the RF frequency
is too high, pulses are on OR (pin 3 of U3). Low pass filter/integrator U1 and surrounding components
form the loop filter.
The second output of the MAIN VCO is buffered by transistors Q3 and Q26. The level from these buffers
is approximately +10 dBm. At the resistor network composed of R86, R87, R88, and R89, this signal is
split, and dropped in level by approximately 4.5 dB and applied to PIN diode switch CR16 and 19 dB to
mixer MX1.
PIN diode switch CR16 routes the MAIN VCO output signal to either the RF dividers (U12 and U13) or
the PIN diode switch CR5. Diodes CR14 and CR15 and transistor Q27 logic selects routing to the PIN
diode switch only when either path of CR5 is selected. Otherwise, the path to the dividers is selected.
For output frequencies of 225 MHz to 450 MHz, the path to CR5 is selected. For frequencies of 225 MHz
to 310 MHz, the path through the 375 MHz low pass filter is selected. For frequencies of 310 MHz to 450
MHz, the through path via C145 is selected.
For output frequencies between 56.25 MHz and 225 MHz, the MAIN VCO output described above is
divided. Between frequencies of 112.5 and 225 MHz, only U12 is enabled. The divided by two output of
U12 is routed via PIN diode switches CR1 and CR2 either through the 260 MHz LP filter for output
frequencies 155 MHz to 225 MHz, or through the 180 MHz LP filter for output frequencies 112.5 MHz to
155 MHz. Between frequencies of 56.25 and 112.5 MHz both U12 and U13 are enabled. In this case,
the divided by four output is routed via PIN diode switches CR2 and CR3 either through the 130 MHz LP
filter for frequencies 75.5 to 112.5 MHz, or through the 90 MHz LP filter for frequencies 56.25 to 75.5
MHz.
For output frequencies of 150 kHz to 56.25 MHz, PIN diode switches CR1 - CR6 are off, isolating the
MAIN VCO output. To produce this low band of frequencies the 400 MHz PLL operates. The 400 MHz
VCO is enabled. The divide by 40 prescaler U11 operates. Phase comparator U10 produces a phase
error signal that is filtered by loop filter U9 and its surrounding components. The loop locks, timing the 10
MHz reference at pin 3 of U10 to the divided RF signal at pin 14. Therefore, a 10 MHz times 40 or 400
MHz is generated by the 400 MHz VCO. Buffer transistor Q4 isolates the phase detector from the VCO.
Likewise buffer transistor Q5 isolates the Mixer (MX1) from the VCO and the phase detector. This 400
MHz input to the Mixer is at a level of approximately 7 dBm. The MAIN VCO output, reduced to a level of
approximately -9 dBm, is applied to the RF input of the mixer. To produce the low band outputs, the
MAIN PLL is tuned to 400 MHz plus the output frequency. Therefore, the MAIN PLL outputs frequencies
from 400.15 MHz to 456.25 MHz. The output of the mixer is filtered to remove the 400+ MHz signals.
Amplified by U14, it then passes through PIN diodes CR12, CR13, and CR7.
NAV 2000R SIGNAL GENERATOR - REV. 0 – JULY 26, 2007 - PG 4-26