DFI 486-OCV Plus User Manual page 55

Pin Name No.
ADR<31..2> 30
ADS# 1
BE<3..0> 4
BLAST# 1
BRDY# 1
D/C# 1
DAT<31..0> 32
ID<4..0> 5
IRQ9 1
LBS16# 1
LCLK 1
LDEV<x># 1
4
LEADS# 1
LGNT<x># 1
4
LKEN# 1
LRDY# 1
LREQ<x># 1
4
M/IO# 1
RDYRTN# 1
RESET# 1
W/R# 1
WBACK# 1
(power) 8
(ground) 14
(reserved) 1
Total per slot 112
Direction of signals for the LBC if the host CPU or a system I/O bus
1
master is active.
Direction of signals for the LBC if an LBM is active.
2
Direction of signals for any LBM while it owns the VL-Bus.
3
One unique signal per slot or device.
4
Note:
LBC = VL Local Bus Controller
LBM = VL Local Bus Master
LBT = VL Local Bus Target
LBC LBC LBM
1 2 3
O I O
O I O
O I O
O I O
I O I
O I O
I/O I/O I/O
O O I
I I O
I O I
O O I
I N/A N/A
O I O
O O I
O O I
I I N/A
I I O
O I O
O O I
O O I
O I O
O O I
Appendix E u E-2
486-OCV Plus
LBT
I
I
I
I
O
I
I/O
I
O
O
I
O
I
N/A
I
O
O
I
I
I
I
N/A