Panasonic PT-60LCX64-K Service Manual page 146

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PT-60LCX64-K
VIDEO SIGNAL PATH III BLOCK DIAGRAM (Models: PT-43LCX64 / PT-50LCX64)
LCD DRIVE C.B.A.
IC2503 (LVDS RECEIVER)
LVDS DATA A(+)
P2501-14
10
LVDS DATA A(-)
P2501-15
9
LVDS DATA B(+)
P2501-11
12
LVDS SERIAL TO
LVDS DATA B(-)
P2501-12
11
FROM VIDEO II
TTL PARALLEL
LVDS DATA C(+)
P2501-8
16
CONVERTER
SIGNAL PATH
LVDS DATA C(-)
P2501-9
15
BLOCK DIAGRAM
LVDS DATA D(+)
P2501-2
20
LVDS DATA D(-)
P2501-3
19
LVDS CLOCK(+)
P2501-5
18
LVDS CLOCK(-)
P2501-6
17
PLL
IC2502
13,23,31,40,48,56
+3.3V
+5V
5
4
VCC
REG.
<FROM IC2304(52)> RESET(L)
<FROM IC2304(57)> CORRECT ON(L)
IC2505 (SIGNAL PROCESS FOR LCD PANEL)
WF125
R DATA (8BIT)
30,32-35,
A5-A7,B6-B8,
W4-W6,Y1-Y7
37-39
C7,C8
S/H CLOCK(R)
XFR(R)
STSQO(R)
NON UNIFORMITY COLOR COMPENSATION
WF126
G DATA (8BIT)
GAMMA CORRECTION
41-43,45-47,
A10-A12,B10-B12,
49,50
C10,C11
WHITE BALANCE CONTROL
TIMING GENERATOR FOR PANEL DRIVE
ENABLE 4
WF127
ENABLE 3
B DATA (8BIT)
1-3,5,51,
A15,A16,B14-B16,
ENABLE 2
53-55
C14-C16
ENABLE 1
WF128
H-SYNC
29
E2
H-SYNC
WF129
V-SYNC
V-SYNC
27
D2
CLOCK(76 MHz)
26
E1
WF130
W15-W19,Y16-Y20
S/H CLOCK(G)
XFR(G)
STSQO(G)
XFRP
D20,E19,E20,F19,F20,
G19,G20,H19,H20,J18
S/H CLOCK(B)
XFR(B)
STSQO(B)
RESET(L)
C19
CORRECT ON(L)
H2
H4,H5,ETC
+3.3V
VDD2(+3.3V)
SERIAL DATA 0
IC2501
SERIAL CLOCK
D7,D8,ETC
+1.8V
8
1
VDD1(+1.8V)
REG.
CS(L)
IC2001 (SAMPLING HOLD)
WF131
6
WF112
R DATA (10BIT)
D/A
86-95
CONVERTER
V2
96
CONTROL
V1
97
LOGIC
W3
98
& DAC LATCH
FRP
U1
99
100
WF113 WF114 WF115
DY
M19
24
23
DX
Y10
33
V9
37
W9
36
LEVEL
Y9
35
SHIFTER
W10
34
(3.3V --> 15.5V)
NRG
M1
27
22
CLX
W8
38
CLY
M18
25
3
SERIAL
5
INTERFACE
4
V-REF-H(+7V)
12
SCALE
11
CONTROL
V-REF-L(+5V)
10
D/A CONVERTER
IC2002 (SAMPLING HOLD)
6
WF116
WF132
G DATA (10BIT)
D/A
86-95
CONVERTER
W13
96
CONTROL
V13
97
LOGIC
Y15
98
& DAC LATCH
Y13
99
100
WF117 WF118 WF119
24
23
33
37
36
LEVEL
35
SHIFTER
34
(3.3V --> 15.5V)
27
22
38
25
3
SERIAL
5
INTERFACE
4
V-REF-H(+7V)
12
SCALE
11
CONTROL
V-REF-L(+5V)
10
D/A CONVERTER
IC2003 (SAMPLING HOLD)
6
WF120
WF133
B DATA (10BIT)
D/A
86-95
CONVERTER
K20
96
CONTROL
K18
97
LOGIC
J19
98
& DAC LATCH
99
100
WF121 WF122
24
23
33
37
36
LEVEL
35
SHIFTER
34
(3.3V --> 15.5V)
27
22
38
25
3
SERIAL
5
INTERFACE
4
V-REF-H(+7V)
12
SCALE
11
CONTROL
V-REF-L(+5V)
10
D/A CONVERTER
WF141
XDIR-X <FROM IC2304 (60)>
IC2504 (BUFFER)
DIR-X <FROM IC2304 (59)>
DIR-Y <FROM IC2304 (50)>
SERIAL DATA 0
B18
2
18
SERIAL CLOCK
B20
3
17
WF142
7
13
IC2001 CS(L)
FROM
SYSTEM CONTROL
5
15
IC2002 CS(L)
BLOCK DIAGRAM
4
16
IC2003 CS(L)
B19
6
14
IC2505CS(L)
146
VIDEO SIGNAL(MAIN/SUB)
+15.5V
P2001-1
P2001-2
WF138
P2001-3
TP2001
P2001-4
(IC2001 PIN52 LINE)
TP2004
P2001-5
P2001-6
INVERTER
ON/OFF
52,54,56,58,60,62,
P2001-(7-18)
AMP
SW
64,66,68,70,72,74
P2001-19
P2001-20
P2001-21
VCC(A)
15,26,53,57,61,65,69,73,82
+15.5V
P2001-22
VCC(D)
1,50
+3.3V
P2001-23
P2001-24
19
P2001-25
18
P2001-26
39
P2001-27
43
P2001-28
42
P2001-29
41
P2001-30
40
P2001-31
28
P2001-32
P2001-33
44
P2001-34
45
P2001-35
20
P2001-36
21
V-REF-H(+7.5V)
81
SCALE
80
CONTROL
V-REF-L(+7V)
79
V1
77
V2
78
LCDCOM
AMP
SW
13
P2002-1
P2002-2
WF139
P2002-3
TP2002
P2002-4
(IC2002 PIN74 LINE)
TP2005
P2002-5
P2002-6
P2002-36
INVERTER
ON/OFF
52,54,56,58,60,62,
P2002-(7-18)
AMP
SW
64,66,68,70,72,74
P2002-19
P2002-20
P2002-21
VCC(A)
15,26,53,57,61,65,69,73,82
+15.5V
P2002-22
VCC(D)
1,50
+3.3V
P2002-23
P2002-24
19
P2002-25
18
P2002-26
39
P2002-27
43
P2002-28
42
P2002-29
41
P2002-30
P2002-31
40
P2002-32
28
P2002-33
17
P2002-34
44
P2002-35
45
P2002-36
20
21
81
V-REF-H(+7.5V)
SCALE
80
CONTROL
79
V-REF-L(+7V)
V1
77
V2
78
LCDCOM
AMP
SW
13
P2003-1
P2003-2
WF140
P2003-3
TP2003
P2003-4
(IC2003 PIN52 LINE)
TP2006
P2003-5
P2003-6
INVERTER
ON/OFF
52,54,56,58,60,62,
P2003-(7-18)
64,66,68,70,72,74
AMP
SW
P2003-19
P2003-20
P2003-21
VCC(A)
15,26,53,57,61,65,69,73,82
+15.5V
P2003-22
VCC(D)
1,50
+3.3V
P2003-23
P2003-24
P2003-25
19
P2003-26
18
P2003-27
39
P2003-28
43
P2003-29
42
41
P2003-30
40
P2003-31
28
P2003-32
P2003-33
44
P2003-34
45
P2003-35
20
P2003-36
21
81
V-REF-H(+7.5V)
SCALE
80
CONTROL
79
V-REF-L(+7V)
V1
77
V2
78
LCDCOM
AMP
SW
13
TP2901
Q2003
VIDEO SIGNAL PATH III BLOCK DIAGRAM
LCD(R)
LCD(G)
LCD(B)
PT-43LCX64/PT-50LCX64

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