Panasonic PT-60LCX64-K Service Manual page 144

PT-60LCX64-K
VIDEO SIGNAL PATH II BLOCK DIAGRAM (1/2)
MAIN C.B.A.
IC5002 (5.6M FIFO MEMORY)
5.6M FIFO
MEMORY
1,13,19,22,35,41,
49,52,53,58,66
+3.3V VCC
+3.3V
Q5001 Q5006 Q5010
P3403-18 B LPF B B
Q5012,
Q5002 Q5007 Q5013
P3403-16 B LPF B B
Q5003 Q5008 Q5011
P3403-15 B LPF B B
FROM VIDEO I
SIGNAL PATH
BLOCK DIAGRAM
Q5015 Q5023 Q5027
P3403-13 B LPF B B
Q5029,
Q5016 Q5024
Q5030
P3403-11 B LPF B B
Q5017 Q5025 Q5028
P3403-10 B LPF B B
IC5803 (HDMI INTERFACE)
JK5801
TMDS DATA0(+)
87
TMDS DATA0(-)
86
TMDS DATA1(+)
92
TMDS DATA1(-)
91 TMDS
TMDS DATA2(+)
HDMI-IN
97 DECODER
TMDS DATA2(-)
96
TMDS CLOCK(+)
84
TMDS CLOCK(-)
83
I2C SERIAL CLOCK
I2C SERIAL DATA
IC5802 (EEPROM)
Q5803
I2C SERIAL CLOCK 6 DRIVE 77 I2C SERIAL CLOCK
Q5802
I2C SERIAL DATA 5 DRIVE 76 I2C SERIAL DATA
8 VCC
+5V
WF58
WF59
FRONT JACK C.B.A.
WF60
JK3901 WF61
WF62
R
P3901-1 P5501-1
G
P3901-3 P5501-3
B
RGB-IN 2 P3901-5 P5501-5
H-SYNC
P3901-7 P5501-7
V-SYNC
P3901-9 P5501-9
WF190
WF54
WF191
WF192
WF55
JK5501
WF56
R
G
WF193
B
RGB-IN 1
H-SYNC
WF57
V-SYNC
WF194
+5V
RGB1(H)RGB2(L)
<FROM IC6003(22)>
IC5005 (MAIN VIDEO SIGNAL PROCESS)
123-127,140-144
120-122,128,129,
138,139,145-147
WF29
R
6-13
2,18,34,47,60,107,119,
132,149,166,181,185, WF30
G
195,197,208,213,224
+3.45V VCC
153-160
Y/PB/PR --RGB CONVERTER
WF31
B
SHARPNESS CONTROL
IC5006
199-206
67,69,77,79,89,91,100 TINT CONTROL
+2.5V
WF32
5 4 VCC
REG. COLOR CONTROL 76MHz CLOCK 16
V-SYNC 162
BRIGHTNESS CONTROL
IC5004
H-SYNC 163
173,177,189,229,233 WF33
+2.5V
5 4 VCC
REG. WF34
Y
36-45
IC5003 3,17,33,46,59,106,131,
PB/PR
151,170,183,193,211,
22-31
+2.5V
236,241,246,253
1 3 VCC
REG.
CLOCK 32
V-SYNC 21
WF23
Y/V
H-SYNC 20
95 A/D
WF24 3D Y/C SEPARATION Y/PB/PR
PB/C
72 A/D 49-58
NTSC DECODER
WF25
PR
83 A/D
GCM2+
CARD Y/PB/PR DATA(8BIT)
FROM SD/PC CARD
SIGNAL PROCESS
CARD V-SYNC
BLOCK DIAGRAM
CARD H-SYNC
WF65
Y
VIDEO DATA CONVERSION
49-55,58
XOR MODE COLOR RANGE SCALING
MASK CONTROL WF66
COLOR SPACE CONVERSION UV
36-39,42-44,48
UP/DOWN CONVERSION
WF67 WF68 WF69
HDMI CLOCK(76MHz)
46
H-SYNC
33
V-SYNC
34
IC5805 (D/A CONVERTER)
32 2 AUDIO
AUDIO DATA
30 3 DATA
DECODER
INTERFACE
31 4
27
MAIN CLOCK
26 1
GENERATOR
1,6,11,14,17,,21,40,
80,82,89,93,95
47,56,64,67,100
+5V 14 VCC
VCC VCC
IC5801 IC5503
+3.3V +3.3V
+3.3V +5V +5V
3 2 8 1
REG. REG.
IC5504 (A/D CONVERTER)
26,27,34,35,
FROM
I2C
I2C SERIAL DATA 1 57 39,42,45,46,
SYSTEM CONTROL
CONTROL 51,52,59,62
I2C SERIAL CLOCK 1 56 VCC
BLOCK DIAGRAM
11,22,23,
WF53
69,78,79
IC5501 (SW) VCC +3.3V
TP5501 WF195
Q5507
H R WF71
1 A/D
L 21 B 54 70-77
7 CONVERTER
TP5502 WF196
Q5508
H G WF72
3 A/D
L 19 B 48 2-9
9 CONVERTER
Q5509
H B WF73
5
A/D
L 15 B 43 12-19
CONVERTER
11
WF75 WF74
TP5503
A/D H-SYNC
66
WF197 A/D CLOCK
67
H-SYNC
30
V-SYNC 31
H
WF198
24
L 22 TP5504 TP5505
23
IC5502 (SYNC SEPARATION) WF63 WF64
H
WF199
12 4
L 14
13
Q5510
SYNC
6 13
20 VCC SEPARATION
16
8 14
+5V 16 VCC
WF35 WF36
IC5009 (SUB VIDEO SIGNAL PROCESS)
Y DATA (10BIT)
148-157
PB/PR DATA (10BIT)
162-171
161 CLOCK
172 V-SYNC
173 H-SYNC
Y/PB/PR DATA (10BIT)
180-189
WF26
Y/V
103
WF27 PB/C
89
WF28
PR
101
Y/PB/PR DATA (8BIT)
135-142
130 CARD V-SYNC
129 CARD H-SYNC
Y DATA (8BIT)
34-41
UV DATA (8BIT)
47-54
CLOCK(76MHz)
55
H-SYNC
56
V-SYNC
57
IC5804 (OP AMP)
4.4 dB
D/A 10 3 1 HDMI AUDIO (R)
TO AUDIO
BLOCK DIAGRAM
D/A 11 5 7 HDMI AUDIO (L)
VEE 4 -5V
VCC 8 +5V
IC5301 (LEVEL SHIFTER)
1 2
5V --> 3.3V
144
WF37
WF38
WF39
IC5012 (64M SDRAM)
Y/PB/PR
64M
I/P CONVERTER
193-200,216-231,246-253 SDRAM
480i --> 480p
1080i --> 1080i
480p --> 480p
720p --> 720p
A/D 1,3,9,15,29,35,41,
43,49,55,75,81
MULTI WINDOW
2D Y/C SEPARATION
A/D PICTURE IN PICTURE
NTSC DECODER
SPLIT SCREEN
SEARCH
A/D
Y/PB/PR
Y
11,27,43,60,64,109,
119,133,146,159,175,
191,202,214,233,244,
VCC +3.45V
UV
255
IC5011
3,8,67,73
+2.5V
VCC +3.3V
4 5
REG.
IC5010
76,86,96,106
+2.5V
VCC 4 5
REG.
IC5008
12,26,42,59,110,118,134,
147,160,176,190,201,
+2.5V
213,232,243,254
VCC 3 1
REG.
GCS2+
131
FROM
SD/PC CARD
27MHz CLOCK
SIGNAL PROCESS
BLOCK DIAGRAM
IC5014 (BUFFER)
RGB MW(L) <FROM IC6003(79)>
10
8 9
13
11 12
4
6 5
R DATA(8BIT)
G DATA(8BIT)
B DATA(8BIT)
VIDEO SIGNAL PATH II BLOCK DIAGRAM (1/2)
PT-43LCX64/PT-50LCX64/PT-60LCX64
R DATA (8BIT)
G DATA (8BIT)
B DATA (8BIT)
VCC +3.3V